Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11661782 | Door control armature assemblies | Brian C. Eickhoff, Brady Plummer, Nagesh Varadaraju, Suresha Chandrasekharareddy, Vijayakumar Mani +2 more | 2023-05-30 |
| 11002055 | Door control armature assemblies | Brian C. Eickhoff, Brady Plummer, Nagesh Varadaraju, Suresha Chandrasekharareddy, Vijayakumar Mani +2 more | 2021-05-11 |
| 8756395 | Controlling DRAM at time DRAM ready to receive command when exiting power down | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Todd Bystrom +1 more | 2014-06-17 |
| 8580044 | Apparatus for agitating and evacuating byproduct dust from a semiconductor processing chamber | Eric McCormick, Rolando Mendez | 2013-11-12 |
| 8127152 | Method of operation of a memory device and system including initialization at a first frequency and operation at a second frequency and a power down exit mode | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Todd Bystrom +1 more | 2012-02-28 |
| 7581121 | System for a memory device having a power down mode and method | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Todd Bystrom +1 more | 2009-08-25 |
| 7574616 | Memory device having a power down exit register | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Todd Bystrom +1 more | 2009-08-11 |
| 7571330 | System and module including a memory device having a power down mode | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Todd Bystrom +1 more | 2009-08-04 |
| 7370152 | Memory controller with prefetching capability | Steven C. Woo, Liewei Bao | 2008-05-06 |
| 7275171 | Method and apparatus for programmable sampling clock edge selection | Jade M. Kizer, Benedict Lau | 2007-09-25 |
| 6842864 | Method and apparatus for configuring access times of memory devices | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Todd Bystrom +1 more | 2005-01-11 |
| 6310814 | Rambus DRAM (RDRAM) apparatus and method for performing refresh operations | Craig E. Hampel, Richard M. Barth, Paul G. Davis, Ramprasad Satagopan, Frederick A. Ware | 2001-10-30 |
| 6282604 | Memory controller and method for meory devices with mutliple banks of memory cells | — | 2001-08-28 |
| 6154821 | Method and apparatus for initializing dynamic random access memory (DRAM) devices by levelizing a read domain | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Todd Bystrom +1 more | 2000-11-28 |
| 6125422 | Dependent bank memory controller method and apparatus | — | 2000-09-26 |
| 6097401 | Integrated graphics processor having a block transfer engine for automatic graphic operations in a graphics system | Richard Charles Andrew Owen, Karl Mills, Lauren Emory Linstad | 2000-08-01 |
| 5969728 | System and method of synchronizing multiple buffers for display | Thomas A. Dye, Mike Xudong Cui | 1999-10-19 |
| 5828383 | Controller for processing different pixel data types stored in the same display memory by use of tag bits | Thuan Hoang | 1998-10-27 |
| 5815168 | Tiled memory addressing with programmable tile dimensions | — | 1998-09-29 |
| 5727139 | Method and apparatus for minimizing number of pixel data fetches required for a stretch operation of video images | Richard Charles Andrew Owen, Karl Mills, Mark Emill Bonnelycke, Vernon Dennis Hasz | 1998-03-10 |
| 5023483 | Apparatus and method for decoding four states with one pin | — | 1991-06-11 |