| 9389637 |
Methods and systems for recovering intermittent timing-reference signals |
Huy M. Nguyen, Vijay Gadde, Kambiz Kaviani, Thomas J. Giovannini |
2016-07-12 |
$1,910,000 |
| 9349422 |
Supporting calibration for sub-rate operation in clocked memory systems |
Akash Bansal, Yohan U. Frans, Kishore Ven Kasamsetty, Simon Li, Arun Vaidyanath |
2016-05-24 |
$6,238,000 |
| 9036436 |
Supporting calibration for sub-rate operation in clocked memory systems |
Akash Bansal, Yohan U. Frans, Kishore Ven Kasamsetty, Simon Li, Arun Vaidyanath |
2015-05-19 |
$2,206,000 |
| 8756395 |
Controlling DRAM at time DRAM ready to receive command when exiting power down |
Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more |
2014-06-17 |
$4,743,000 |
| 8130891 |
Clock-data recovery (“CDR”) circuit, apparatus and method for variable frequency data |
Dennis Kim, Jason C. Wei, Yohan Frans, Nhat Nguyen, Kevin S. Donnelly |
2012-03-06 |
$4,536,000 |
| 8127152 |
Method of operation of a memory device and system including initialization at a first frequency and operation at a second frequency and a power down exit mode |
Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more |
2012-02-28 |
$3,671,000 |
| 7668271 |
Clock-data recovery (“CDR”) circuit, apparatus and method for variable frequency data |
Dennis Kim, Jason C. Wei, Yohan Frans, Nhat Nguyen, Kevin S. Donnelly |
2010-02-23 |
$14,346,000 |
| 7581121 |
System for a memory device having a power down mode and method |
Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more |
2009-08-25 |
$22,405,000 |
| 7574616 |
Memory device having a power down exit register |
Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more |
2009-08-11 |
$37,253,000 |
| 7571330 |
System and module including a memory device having a power down mode |
Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more |
2009-08-04 |
$19,546,000 |
| 7084681 |
PLL lock detection circuit using edge detection and a state machine |
Michael Green, Nhat Nguyen, Yohan Frans, Dennis Kim |
2006-08-01 |
$8,360,000 |
| 6879195 |
PLL lock detection circuit using edge detection |
Michael Green, Nhat Nguyen, Yohan Frans, Dennis Kim |
2005-04-12 |
$22,262,000 |
| 6842864 |
Method and apparatus for configuring access times of memory devices |
Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more |
2005-01-11 |
$35,482,000 |
| 6154821 |
Method and apparatus for initializing dynamic random access memory (DRAM) devices by levelizing a read domain |
Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more |
2000-11-28 |
$147,773,000 |