Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9389637 | Methods and systems for recovering intermittent timing-reference signals | Huy M. Nguyen, Vijay Gadde, Kambiz Kaviani, Thomas J. Giovannini | 2016-07-12 |
| 9349422 | Supporting calibration for sub-rate operation in clocked memory systems | Akash Bansal, Yohan U. Frans, Kishore Ven Kasamsetty, Simon Li, Arun Vaidyanath | 2016-05-24 |
| 9036436 | Supporting calibration for sub-rate operation in clocked memory systems | Akash Bansal, Yohan U. Frans, Kishore Ven Kasamsetty, Simon Li, Arun Vaidyanath | 2015-05-19 |
| 8756395 | Controlling DRAM at time DRAM ready to receive command when exiting power down | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more | 2014-06-17 |
| 8130891 | Clock-data recovery (“CDR”) circuit, apparatus and method for variable frequency data | Dennis Kim, Jason C. Wei, Yohan Frans, Nhat Nguyen, Kevin S. Donnelly | 2012-03-06 |
| 8127152 | Method of operation of a memory device and system including initialization at a first frequency and operation at a second frequency and a power down exit mode | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more | 2012-02-28 |
| 7668271 | Clock-data recovery (“CDR”) circuit, apparatus and method for variable frequency data | Dennis Kim, Jason C. Wei, Yohan Frans, Nhat Nguyen, Kevin S. Donnelly | 2010-02-23 |
| 7581121 | System for a memory device having a power down mode and method | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more | 2009-08-25 |
| 7574616 | Memory device having a power down exit register | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more | 2009-08-11 |
| 7571330 | System and module including a memory device having a power down mode | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more | 2009-08-04 |
| 7084681 | PLL lock detection circuit using edge detection and a state machine | Michael Green, Nhat Nguyen, Yohan Frans, Dennis Kim | 2006-08-01 |
| 6879195 | PLL lock detection circuit using edge detection | Michael Green, Nhat Nguyen, Yohan Frans, Dennis Kim | 2005-04-12 |
| 6842864 | Method and apparatus for configuring access times of memory devices | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more | 2005-01-11 |
| 6154821 | Method and apparatus for initializing dynamic random access memory (DRAM) devices by levelizing a read domain | Richard M. Barth, Ely Tsern, Craig E. Hampel, Frederick A. Ware, Bradley A. May +1 more | 2000-11-28 |