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USPTO Patent Rankings Data through Dec 31, 2025
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Frederick A. Ware — 745 Patents

RARambus: 708 patents #1 of 549Top 1%
FTFlex Logix Technologies: 14 patents #2 of 11Top 20%
HLHefei Reliance Memory Limited: 5 patents #14 of 28Top 50%
HP: 5 patents #3,830 of 7,018Top 55%
ADAnalog Devices: 2 patents #836 of 1,990Top 45%
WEWeitek: 2 patents #3 of 14Top 25%
Intel: 2 patents #13,316 of 30,777Top 45%
LSLattice Semiconductor: 1 patents #317 of 544Top 60%
CSCadence Design Systems: 1 patents #1,216 of 2,263Top 55%
Los Altos Hills, CA: #2 of 812 inventorsTop 1%
California: #50 of 386,348 inventorsTop 1%
Overall (All Time): #140 of 4,157,543Top 1%
745 Patents All Time
Frederick A. Ware has been granted 745 US patents while listed as an inventor at Rambus. The first was granted in 1981 and the most recent in December 2025. Frederick A. Ware ranks #140 of 4,157,543 US inventors in our database (top 0.00%). Patent records list Frederick A. Ware in Los Altos Hills, CA, US.

Issued Patents All Time

Showing 1–25 of 745 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12504904 Memory controller partitioning for hybrid memory system John Eric Linstadt 2025-12-23
12493568 Semiconductor memory systems with on-die data buffering Amir Amirkhany, Suresh Rajan, Mohammad Hekmat, Dinesh Patil 2025-12-09
12488814 DRAM interface mode with improved channel integrity and efficiency at high signaling rates — 2025-12-02
12461713 MAC processing pipelines, circuitry to configure same, and methods of operating same Cheng C. Wang 2025-11-04
12455723 MAC processing pipeline having activation circuitry, and methods of operating same Cheng C. Wang 2025-10-28
12436907 Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules Ely Tsern, John Eric Linstadt, Thomas J. Giovannini, Kenneth L. Wright 2025-10-07
12411729 Energy-efficient error-correction-detection storage John Eric Linstadt, Liji Gopalakrishnan 2025-09-09
12411781 Memory system with cached memory module operations Kenneth L. Wright, John Eric Linstadt, Craig E. Hampel 2025-09-09
12401393 Configurable, power supply voltage referenced single-ended signaling with ESD protection John W. Poulton, Carl W. Werner 2025-08-26
12394500 Memory system with error detection John Eric Linstadt 2025-08-19
12379955 Stall-driven multi-processing — 2025-08-05
12373333 Memory system with activate-leveling method Craig E. Hampel 2025-07-29
12367921 System application of DRAM component with cache mode Thomas Vogelsang, Michael Raymond Miller, Collins Williams 2025-07-22
12367159 Low latency memory access — 2025-07-22
12346188 Optimizing power in a memory device Dinesh Patil, Amir Amirkhany, Farrukh Aquil, Kambiz Kaviani 2025-07-01
12340123 Memory systems, modules, and methods for improved capacity Scott C. Best 2025-06-24
12314607 Variable memory access granularity — 2025-05-27
12314113 Memory controller operable in data loop-back mode Robert E. Palmer, John W. Poulton, Andrew M. Fuller 2025-05-27
12307126 Cascaded memory system Christopher Haywood 2025-05-20
12300307 Memory systems and methods for improved power management James E. Harris 2025-05-13
12298926 High-performance, high-capacity memory systems and modules Ely Tsern, John Eric Linstadt, Thomas J. Giovannini, Craig E. Hampel, Scott C. Best +1 more 2025-05-13
12298920 Memory access during memory calibration Ian Shaeffer 2025-05-13
12298842 Memory module register access Thomas J. Giovannini, Catherine Chen, Scott C. Best, John Eric Linstadt 2025-05-13
12300345 Area-efficient, width-adjustable signaling interface — 2025-05-13
12287705 Memory device and repair method with column-based error code tracking Brent Haukness 2025-04-29

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