Issued Patents All Time
Showing 25 most recent of 131 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12200860 | Load reduced memory module | Frederick A. Ware | 2025-01-14 |
| 12190974 | DRAM retention test method for dynamic error correction | Ely Tsern, Frederick A. Ware, Thomas Vogelsang | 2025-01-07 |
| 12148462 | High capacity memory system using standard controller component | Frederick A. Ware, Scott C. Best | 2024-11-19 |
| 12147367 | Folded memory modules | Amir Amirkhany, Ravindranath Kollipara, Ian Shaeffer, David A. Secker | 2024-11-19 |
| 11960418 | Semiconductor memory systems with on-die data buffering | Frederick A. Ware, Amir Amirkhany, Mohammad Hekmat, Dinesh Patil | 2024-04-16 |
| 11963299 | Load reduced memory module | Frederick A. Ware | 2024-04-16 |
| 11907555 | High performance, high capacity memory modules and systems | Abhijit M. Abhyankar, Ravindranath Kollipara, David A. Secker | 2024-02-20 |
| 11899597 | High capacity memory system with improved command-address and chip-select signaling mode | Frederick A. Ware, Abhijit M. Abhyankar | 2024-02-13 |
| 11823732 | High capacity memory system using standard controller component | Frederick A. Ware, Scott C. Best | 2023-11-21 |
| 11755521 | Folded memory modules | Amir Amirkhany, Ravindranath Kollipara, Ian Shaeffer, David A. Secker | 2023-09-12 |
| 11646090 | DRAM retention test method for dynamic error correction | Ely Tsern, Frederick A. Ware, Thomas Vogelsang | 2023-05-09 |
| 11568919 | High capacity memory system using standard controller component | Frederick A. Ware, Scott C. Best | 2023-01-31 |
| 11520508 | High performance, high capacity memory modules and systems | Abhijit M. Abhyankar, Ravindranath Kollipara, David A. Secker | 2022-12-06 |
| 11487679 | Semiconductor memory systems with on-die data buffering | Frederick A. Ware, Amir Amirkhany, Mohammad Hekmat, Dinesh Patil | 2022-11-01 |
| 11409682 | Folded memory modules | Amir Amirkhany, Ravindranath Kollipara, Ian Shaeffer, David A. Secker | 2022-08-09 |
| 11317510 | Load reduced memory module | Frederick A. Ware | 2022-04-26 |
| 11243897 | High capacity memory system with improved command-address and chip-select signaling mode | Frederick A. Ware, Abhijit M. Abhyankar | 2022-02-08 |
| 11024362 | High capacity memory system using standard controller component | Frederick A. Ware, Scott C. Best | 2021-06-01 |
| 11011248 | DRAM retention test method for dynamic error correction | Ely Tsern, Frederick A. Ware, Thomas Vogelsang | 2021-05-18 |
| 10866916 | Folded memory modules | Amir Amirkhany, Ravindranath Kollipara, Ian Shaeffer, David A. Secker | 2020-12-15 |
| 10831685 | Semiconductor memory systems with on-die data buffering | Frederick A. Ware, Amir Amirkhany, Mohammad Hekmat, Dinesh Patil | 2020-11-10 |
| 10813216 | Load reduced memory module | Frederick A. Ware | 2020-10-20 |
| 10678459 | High performance, high capacity memory modules and systems | Abhijit M. Abhyankar, Ravindranath Kollipara, David A. Secker | 2020-06-09 |
| 10642762 | High capacity memory system with improved command-address and chip-select signaling mode | Frederick A. Ware, Abhijit M. Abhyankar | 2020-05-05 |
| 10497457 | DRAM retention test method for dynamic error correction | Ely Tsern, Frederick A. Ware, Thomas Vogelsang | 2019-12-03 |