Issued Patents All Time
Showing 1–25 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11907555 | High performance, high capacity memory modules and systems | Suresh Rajan, Ravindranath Kollipara, David A. Secker | 2024-02-20 |
| 11899597 | High capacity memory system with improved command-address and chip-select signaling mode | Frederick A. Ware, Suresh Rajan | 2024-02-13 |
| 11520508 | High performance, high capacity memory modules and systems | Suresh Rajan, Ravindranath Kollipara, David A. Secker | 2022-12-06 |
| 11243897 | High capacity memory system with improved command-address and chip-select signaling mode | Frederick A. Ware, Suresh Rajan | 2022-02-08 |
| 10686448 | Clock architecture, including clock mesh fabric for FPGA, and method of operating same | Nitish U. Natu, Cheng C. Wang | 2020-06-16 |
| 10678459 | High performance, high capacity memory modules and systems | Suresh Rajan, Ravindranath Kollipara, David A. Secker | 2020-06-09 |
| 10642762 | High capacity memory system with improved command-address and chip-select signaling mode | Frederick A. Ware, Suresh Rajan | 2020-05-05 |
| 10411711 | FPGA having a virtual array of logic tiles, and method of configuring and operating same | Anthony Kozaczuk, Cheng C. Wang | 2019-09-10 |
| 10348308 | Clock architecture, including clock mesh fabric, for FPGA, and method of operating same | Nitish U. Natu, Cheng C. Wang | 2019-07-09 |
| 10223299 | High capacity memory system with improved command-address and chip-select signaling mode | Frederick A. Ware, Suresh Rajan | 2019-03-05 |
| 9298228 | Memory capacity expansion using a memory riser | Ravindranath Kollipara, Thomas J. Giovannini, Ming Li, David A. Secker, Arun Vaidyanath +2 more | 2016-03-29 |
| 8560797 | Method and apparatus for indicating mask information | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2013-10-15 |
| 8205056 | Memory controller for controlling write signaling | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2012-06-19 |
| 8019958 | Memory write signaling and methods thereof | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2011-09-13 |
| 7793039 | Interface for a semiconductor memory device and method for controlling the interface | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2010-09-07 |
| 7496709 | Integrated circuit memory device having delayed write timing based on read response time | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2009-02-24 |
| 7360050 | Integrated circuit memory device having delayed write capability | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2008-04-15 |
| 7330953 | Memory system having delayed write timing | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2008-02-12 |
| 7330952 | Integrated circuit memory device having delayed write timing based on read response time | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2008-02-12 |
| 7288973 | Method and apparatus for fail-safe resynchronization with minimum latency | Jared L. Zerbe, Michael Ching, Richard M. Barth, Andy Peng-Pui Chan, Paul G. Davis +1 more | 2007-10-30 |
| 7287119 | Integrated circuit memory device with delayed write command processing | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2007-10-23 |
| 7197611 | Integrated circuit memory device having write latency function | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2007-03-27 |
| 7039782 | Memory system with channel multiplexing of multiple memory devices | Billy Wayne Garrett, Jr., Frederick A. Ware, Craig E. Hampel, Richard M. Barth, Donald C. Stark +4 more | 2006-05-02 |
| 6949958 | Phase comparator capable of tolerating a non-50% duty-cycle clocks | Jared L. Zerbe, Michael Ching, Richard M. Barth, Andy Peng-Pui Chan, Paul G. Davis +1 more | 2005-09-27 |
| 6868474 | High performance cost optimized memory | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2005-03-15 |