Issued Patents All Time
Showing 1–25 of 128 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12379858 | Memory module with persistent calibration | Thomas Vogelsang | 2025-08-05 |
| 12327587 | Method of RRAM write ramping voltage in intervals | Zhichao Lu | 2025-06-10 |
| 12287705 | Memory device and repair method with column-based error code tracking | Frederick A. Ware | 2025-04-29 |
| 12232335 | RRAM process integration scheme and cell structure with reduced masking operations | Zhichao Lu | 2025-02-18 |
| 12222829 | Memory module with dedicated repair devices | Frederick A. Ware, John Eric Linstadt, Scott C. Best | 2025-02-11 |
| 12217784 | Boosted writeback voltage | Thomas Vogelsang | 2025-02-04 |
| 12211540 | Protocol for refresh between a memory controller and a memory device | Frederick A. Ware | 2025-01-28 |
| 12204469 | Unsuccessful write retry buffer | Hongzhong Zheng | 2025-01-21 |
| 12165047 | Memory-integrated neural network | Dongyun Lee | 2024-12-10 |
| 12147362 | Deterministic operation of storage class memory | Frederick A. Ware | 2024-11-19 |
| 12130703 | Memory component with error-detect-correct code interface | Frederick A. Ware, Lawrence Lai | 2024-10-29 |
| 12027206 | Techniques for initializing resistive memory devices by applying voltages with different polarities | Zhichao Lu, Gary B. Bronner | 2024-07-02 |
| 12002513 | Self-annealing data storage system | Gary B. Bronner, Mark A. Horowitz, Mark D. Kellam, Fariborz Assaderaghi | 2024-06-04 |
| 11989430 | Memory module with persistent calibration | Thomas Vogelsang | 2024-05-21 |
| 11947471 | Unsuccessful write retry buffer | Hongzhong Zheng | 2024-04-02 |
| 11921576 | Memory device and repair method with column-based error code tracking | Frederick A. Ware | 2024-03-05 |
| 11908515 | 2T-1R architecture for resistive ram | Deepak C. Sekar, Wayne F. Ellis, Gary B. Bronner, Thomas Vogelsang | 2024-02-20 |
| 11900981 | Protocol for refresh between a memory controller and a memory device | Frederick A. Ware | 2024-02-13 |
| 11848050 | Resistance change memory cell circuits and methods | — | 2023-12-19 |
| 11829307 | DRAM interface mode with interruptible internal transfer operation | Liji Gopalakrishnan, Frederick A. Ware | 2023-11-28 |
| 11790973 | Memory component with efficient write operations | Frederick A. Ware, John Eric Linstadt, Kenneth L. Wright, Thomas Vogelsang | 2023-10-17 |
| 11782807 | Memory module with dedicated repair devices | Frederick A. Ware, John Eric Linstadt, Scott C. Best | 2023-10-10 |
| 11762737 | Memory component with error-detect-correct code interface | Frederick A. Ware, Lawrence Lai | 2023-09-19 |
| 11755509 | Deterministic operation of storage class memory | Frederick A. Ware | 2023-09-12 |
| 11735262 | Adaptive memory cell write conditions | Zhichao Lu | 2023-08-22 |