BH

Brent Haukness

RA Rambus: 82 patents #18 of 549Top 4%
HL Hefei Reliance Memory Limited: 27 patents #2 of 28Top 8%
S3 Sandisk 3D: 8 patents #57 of 180Top 35%
TI Texas Instruments: 6 patents #2,401 of 12,488Top 20%
CR Cryptography Research: 2 patents #35 of 64Top 55%
ST Sandisk Technologies: 1 patents #1,320 of 2,224Top 60%
Micron: 1 patents #4,761 of 6,345Top 80%
📍 Sunnyvale, CA: #55 of 14,302 inventorsTop 1%
🗺 California: #1,366 of 386,348 inventorsTop 1%
Overall (All Time): #8,604 of 4,157,543Top 1%
128
Patents All Time

Issued Patents All Time

Showing 26–50 of 128 patents

Patent #TitleCo-InventorsDate
11682457 Method of RRAM write ramping voltage in intervals Zhichao Lu 2023-06-20
11651823 Fractional program commands for memory devices Ian Shaeffer, Gary B. Bronner 2023-05-16
11568929 2T-1R architecture for resistive RAM Deepak C. Sekar, Wayne F. Ellis, Gary B. Bronner, Thomas Vogelsang 2023-01-31
11551741 Protocol for refresh between a memory controller and a memory device Frederick A. Ware 2023-01-10
11487617 Memory component with error-detect-correct code interface Frederick A. Ware, Lawrence Lai 2022-11-01
11468947 Techniques for initializing resistive memory devices by applying voltages with different polarities Zhichao Lu, Gary B. Bronner 2022-10-11
11462585 RRAM process integration scheme and cell structure with reduced masking operations Zhichao Lu 2022-10-04
11409672 Unsuccessful write retry buffer Hongzhong Zheng 2022-08-09
11380396 Resistance change memory cell circuits and methods 2022-07-05
11373704 System and method for performing memory operations in RRAM cells 2022-06-28
11347608 Memory module with dedicated repair devices Frederick A. Ware, John Eric Linstadt, Scott C. Best 2022-05-31
11314669 Deterministic operation of storage class memory Frederick A. Ware 2022-04-26
11302394 Adaptive memory cell write conditions Zhichao Lu 2022-04-12
11244727 Dynamic memory rank configuration Gary B. Bronner, Mark A. Horowitz, Mark D. Kellam, Fariborz Assaderaghi 2022-02-08
11238930 Method of RRAM WRITE ramping voltage in intervals Zhichao Lu 2022-02-01
11226909 DRAM interface mode with interruptible internal transfer operation Liji Gopalakrishnan, Frederick A. Ware 2022-01-18
11204825 Memory device and repair method with column-based error code tracking Frederick A. Ware 2021-12-21
11081176 2T-1R architecture for resistive RAM Deepak C. Sekar, Wayne F. Ellis, Gary B. Bronner, Thomas Vogelsang 2021-08-03
11069392 Memory component with efficient write operations Frederick A. Ware, John Eric Linstadt, Kenneth L. Wright, Thomas Vogelsang 2021-07-20
11068388 Verify before program resume for memory devices Ian Shaeffer 2021-07-20
10998044 RRAM write using a ramp control circuit Zhichao Lu 2021-05-04
10943655 Techniques for initializing resistive memory devices by applying different polarity voltages across resistance change material Zhichao Lu, Gary B. Bronner 2021-03-09
10902915 Resistance change memory cell circuits and methods 2021-01-26
10896137 Non-volatile memory for secure storage of authentication data Scott C. Best, Carl W. Werner 2021-01-19
10892001 Protocol for refresh between a memory controller and a memory device Frederick A. Ware 2021-01-12