Issued Patents All Time
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12300680 | Semiconductor packages having photon integrated circuit (PIC) chips | — | 2025-05-13 |
| 11525956 | Semiconductor devices having electro-optical substrates | — | 2022-12-13 |
| 11239377 | Optoelectronic module package | Gerald Cois Byrd, Thomas Pierre Schrans, Chia-Te Chou, Arin Abed | 2022-02-01 |
| 11024617 | Semiconductor packages having photon integrated circuit (PIC) chips | — | 2021-06-01 |
| 10928585 | Semiconductor devices having electro-optical substrates | — | 2021-02-23 |
| 10199152 | Embedded thin film magnetic carrier for integrated voltage regulator | Mete Erturk, Ravindra V. Shenoy, Kwan-Yu Lai, Jitae Kim, Donald William Kidwell, Jr. +2 more | 2019-02-05 |
| 10150667 | Panel level packaging for MEMS application | Yaoling Pan | 2018-12-11 |
| 9929097 | Mechanical adhesion of copper metallization to dielectric with partially cured epoxy fillers | Ravi Kiran Nalla, Houssam Jomaa | 2018-03-27 |
| 9806063 | Reinforced wafer level package comprising a core layer for reducing stress in a solder joint and improving solder joint reliability | Chin-Kwan Kim, Rajneesh Kumar, Vladimir Noveski, Jie Fu, Ahmer Syed +1 more | 2017-10-31 |
| 9679841 | Substrate and method of forming the same | Houssam Jomaa, Kuiwon Kang, Chin-Kwan Kim | 2017-06-13 |
| 9642259 | Embedded bridge structure in a substrate | Chin-Kwan Kim, Dong Wook Kim, Hong Bok We | 2017-05-02 |
| 9609751 | Package substrate comprising surface interconnect and cavity comprising electroless fill | Houssam Jomaa, Chin-Kwan Kim | 2017-03-28 |
| 9601435 | Semiconductor package with embedded components and method of making the same | Chin-Kwan Kim, David Fraser Rae, Rajneesh Kumar, Milind Shah | 2017-03-21 |
| 9484327 | Package-on-package structure with reduced height | Chin-Kwan Kim, Milind Shah, Marcus HSU, David Fraser Rae | 2016-11-01 |
| 9461008 | Solder on trace technology for interconnect attachment | Rajneesh Kumar | 2016-10-04 |
| 9398699 | Dual epoxy dielectric and photosensitive solder mask coatings, and processes of making same | Houssam Jomaa | 2016-07-19 |
| 9379090 | System, apparatus, and method for split die interconnection | Ahmer Syed, Chin-Kwan Kim, Milind Shah, Ryan David Lane | 2016-06-28 |
| 9370097 | Package substrate with testing pads on fine pitch traces | Chin-Kwan Kim, Kuiwon Kang | 2016-06-14 |
| 9355898 | Package on package (PoP) integrated device comprising a plurality of solder resist layers | Rajneesh Kumar, Houssam Jomaa, David Fraser Rae, Layal Rouhana | 2016-05-31 |
| 9269681 | Surface finish on trace for a thermal compression flip chip (TCFC) | Houssam Jomaa, Milind Shah, Manuel Aldrete, Chin-Kwan Kim | 2016-02-23 |
| 9159670 | Ultra fine pitch and spacing interconnects for substrate | Chin-Kwan Kim, Rajneesh Kumar | 2015-10-13 |
| 9040842 | Mechanical adhesion of copper metallization to dielectric with partially cured epoxy fillers | Ravi Kiran Nalla, Houssam Jomaa | 2015-05-26 |
| 8802556 | Barrier layer on bump and non-wettable coating on trace | Milind Shah, Houssam Jomaa, Manuel Aldrete, Chin-Kwan Kim | 2014-08-12 |
| 8772951 | Ultra fine pitch and spacing interconnects for substrate | Chin-Kwan Kim, Rajneesh Kumar | 2014-07-08 |
| 8742603 | Process for improving package warpage and connection reliability through use of a backside mold configuration (BSMC) | Milind Shah, Sashidhar Movva | 2014-06-03 |