Issued Patents All Time
Showing 26–50 of 154 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11996860 | Scaled bit flip thresholds across columns for irregular low density parity check decoding | Eyal En Gad, Sivagnanam Parthasarathy, Yoav Weinberg | 2024-05-28 |
| 11994947 | Multi-layer code rate architecture for special event protection with reduced performance penalty | Kishore Kumar Muchherla, Huai-Yuan Tseng, Akira Goda, Sivagnanam Parthasarathy, Jonathan S. Parry | 2024-05-28 |
| 11983067 | Adjustment of code rate as function of memory endurance state metric | Kishore Kumar Muchherla, Niccolo′ Righetti, Sivagnanam Parthasarathy, Mark A. Helm, James Fitzpatrick +1 more | 2024-05-14 |
| 11966616 | Voltage bin calibration based on a voltage distribution reference voltage | Kishore Kumar Muchherla, Devin M. Batutis, Xiangang Luo, Peter Feeley, Sivagnanam Parthasarathy +2 more | 2024-04-23 |
| 11934266 | Memory compaction management in memory devices | Vamsi Pavan Rayaprolu, Sivagnanam Parthasarathy, Patrick R. Khayat, Sampath K. Ratnam, Kishore Kumar Muchherla +2 more | 2024-03-19 |
| 11928347 | Managing voltage bin selection for blocks of a memory device | Kishore Kumar Muchherla, Peter Feeley, Sampath K. Ratnam, Shane Nowell, Sivagnanam Parthasarathy +2 more | 2024-03-12 |
| 11923868 | Stall mitigation in iterative decoders | Sivagnanam Parthasarathy | 2024-03-05 |
| 11923867 | Iterative decoder with a dynamic maximum stop condition | Sivagnanam Parthasarathy | 2024-03-05 |
| 11915776 | Error avoidance based on voltage distribution parameters of block families | Michael Sheperek, Kishore Kumar Muchherla, Shane Nowell, Larry J. Koudele | 2024-02-27 |
| 11901911 | Stall detection and mitigation in iterative decoders | Sivagnanam Parthasarathy | 2024-02-13 |
| 11886718 | Descrambling of scrambled linear codewords using non-linear scramblers | Patrick R. Khayat, Sivagnanam Parthasarathy | 2024-01-30 |
| 11886336 | Managing workload of programming sets of pages to memory device | Kishore Kumar Muchherla, Karl D. Schuh, Jiangang Wu, Devin M. Batutis, Xiangang Luo | 2024-01-30 |
| 11886726 | Block family-based error avoidance for memory devices | Michael Sheperek, Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Bruce A. Liikanen, Peter Feeley +3 more | 2024-01-30 |
| 11869605 | Adjusting pass-through voltage based on threshold voltage shift | Kishore Kumar Muchherla, Sampath K. Ratnam, Peter Feeley, Sivagnanam Parthasarathy | 2024-01-09 |
| 11868639 | Providing recovered data to a new memory cell at a memory sub-system based on an unsuccessful error correction operation | Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Sivagnanam Parthasarathy, Kishore Kumar Muchherla, Shane Nowell +2 more | 2024-01-09 |
| 11854649 | Temperature-compensated time estimate for a block to reach a uniform charge loss state | Patrick R. Khayat, Steven Michael Kientz, Sivagnanam Parthasarathy, Vamsi Pavan Rayaprolu | 2023-12-26 |
| 11847317 | Managing bin placement for block families of a memory device based on trigger metric valves | Shane Nowell | 2023-12-19 |
| 11837291 | Voltage offset bin selection by die group for memory devices | Vamsi Pavan Rayaprolu, Michael Sheperek, Larry J. Koudele, Shane Nowell | 2023-12-05 |
| 11837307 | Managing error-handling flows in memory devices | Kishore Kumar Muchherla, Shane Nowell, Sampath K. Ratnam, Peter Feeley, Sivagnanam Parthasarathy +2 more | 2023-12-05 |
| 11829245 | Multi-layer code rate architecture for copyback between partitions with different code rates | Kishore Kumar Muchherla, Sivagnanam Parthasarathy, James Fitzpatrick, Mark A. Helm | 2023-11-28 |
| 11823722 | Determining voltage offsets for memory read operations | Kishore Kumar Muchherla, Sampath K. Ratnam, Shane Nowell, Peter Feeley, Sivagnanam Parthasarathy | 2023-11-21 |
| 11823748 | Voltage bin calibration based on a temporary voltage shift offset | Kishore Kumar Muchherla, Karl D. Schuh, Xiangang Luo, Shane Nowell, Devin M. Batutis +4 more | 2023-11-21 |
| 11797205 | Measurement of representative charge loss in a block to determine charge loss state | Patrick R. Khayat, Steven Michael Kientz, Sivagnanam Parthasarathy, Vamsi Pavan Rayaprolu | 2023-10-24 |
| 11783901 | Multi-tier threshold voltage offset bin calibration | Kishore Kumar Muchherla, Shane Nowell, Karl D. Schuh, Jiangang Wu, Devin M. Batutis +1 more | 2023-10-10 |
| 11777522 | Bit flipping decoder with dynamic bit flipping criteria | Sivagnanam Parthasarathy, Eyal En Gad | 2023-10-03 |