Issued Patents All Time
Showing 226–250 of 314 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6040208 | Angled ion implantation for selective doping | Jeffrey W. Honeycutt, Fawad Ahmed | 2000-03-21 |
| 6005273 | Transistors having controlled conductive spacers, uses of such transistors and methods of making such transistors | David Y. Kao | 1999-12-21 |
| 6004868 | Method for CMOS well drive in a non-inert ambient | J. Brett Rolfson, Tyler Lowrey, W. Richard Barbour | 1999-12-21 |
| 6002140 | Method for fabricating an array of ultra-small pores for chalcogenide memory cells | Raymond A. Turi | 1999-12-14 |
| 5998244 | Memory cell incorporating a chalcogenide element and method of making same | Graham R. Wolstenholme, Russell C. Zahorik | 1999-12-07 |
| 5994220 | Method for forming a semiconductor connection with a top surface having an enlarged recess | Guy T. Blalock, Kirk D. Prall | 1999-11-30 |
| 5994182 | Method of reducing outdiffusion from a doped three-dimensional polysilicon film into substrate by using angled implants | D. Mark Durcan, Luan C. Tran, Robert Kerr, David F. Cheffings, Howard E. Rhodes | 1999-11-30 |
| 5990002 | Method of making an antireflective structure | Ardavan Niroomand | 1999-11-23 |
| 5989980 | Semiconductor processing method of forming field isolation oxide relative to a semiconductor substrate | Roger Lee | 1999-11-23 |
| 5985698 | Fabrication of three dimensional container diode for use with multi-state material in a non-volatile memory cell | Raymond A. Turi, Graham R. Wolstenholme, Charles L. Ingalls | 1999-11-16 |
| 5981367 | Method for making an access transistor | — | 1999-11-09 |
| 5970336 | Method of making memory cell incorporating a chalcogenide element | Graham R. Wolstenholme, Russell C. Zahorik | 1999-10-19 |
| 5959323 | Charge-pumping to increase electron collection efficiency | — | 1999-09-28 |
| 5953621 | Method for forming a self-aligned isolation trench | David L. Chapek, Randhir P. S. Thakur | 1999-09-14 |
| 5950079 | Semiconductor processing methods of forming complementary metal oxide semiconductor memory and other circuitry | Jeffrey W. Honeycutt | 1999-09-07 |
| 5936260 | Semiconductor reliability test chip | Tim J. Corbett, Raymond P. Scholer | 1999-08-10 |
| 5937287 | Fabrication of semiconductor structures by ion implantation | — | 1999-08-10 |
| 5929507 | Gettering regions and methods of forming gettering regions within a semiconductor wafer | Jeffrey W. Honeycutt | 1999-07-27 |
| 5912840 | Memory cell architecture utilizing a transistor having a dual access gate | David Y. Kao | 1999-06-15 |
| 5903026 | Isolation structure for semiconductor devices | — | 1999-05-11 |
| 5897363 | Shallow junction formation using multiple implant sources | Randhir P. S. Thakur | 1999-04-27 |
| 5892285 | Semiconductor connection with a top surface having an enlarged recess | Guy T. Blalock, Kirk D. Prall | 1999-04-06 |
| 5886391 | Antireflective structure | Ardavan Niroomand | 1999-03-23 |
| 5879955 | Method for fabricating an array of ultra-small pores for chalcogenide memory cells | Raymond A. Turi | 1999-03-09 |
| 5869405 | In situ rapid thermal etch and rapid thermal oxidation | Randhir P. S. Thakur | 1999-02-09 |