Issued Patents All Time
Showing 201–225 of 314 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6153890 | Memory cell incorporating a chalcogenide element | Graham R. Wolstenholme, Russell C. Zahorik | 2000-11-28 |
| 6140214 | Semiconductor processing methods, semiconductor processing methods of forming diodes, and semiconductor processing methods of forming schottky diodes | Michael P. Violette | 2000-10-31 |
| 6133123 | Fabrication of semiconductor gettering structures by ion implantation | — | 2000-10-17 |
| 6130140 | Method of forming an isolation structure in a semiconductor device | — | 2000-10-10 |
| 6124173 | Method for improved storage node isolation | David Y. Kao | 2000-09-26 |
| 6121665 | Methods of forming field effect transistors and field effect transistor circuitry | Chandra Mouli | 2000-09-19 |
| 6118135 | Three-dimensional container diode for use with multi-state material in a non-volatile memory cell | Raymond A. Turi, Graham R. Wolstenholme, Charles L. Ingalls | 2000-09-12 |
| 6114223 | Gettering regions and methods of forming gettering regions within a semiconductor wafer | Jeffrey W. Honeycutt | 2000-09-05 |
| 6111264 | Small pores defined by a disposable internal spacer for use in chalcogenide memories | Graham R. Wolstenholme, Steven T. Harshfield, Raymond A. Turi, Guy T. Blalock, Donwon Park | 2000-08-29 |
| 6111325 | Gettering regions and methods of forming gettering regions within a semiconductor wafer | Jeffrey W. Honeycutt | 2000-08-29 |
| 6110798 | Method of fabricating an isolation structure on a semiconductor substrate | Chandra Mouli | 2000-08-29 |
| 6111282 | Charge-pumping to increase electron collection efficiency | — | 2000-08-29 |
| 6104038 | Method for fabricating an array of ultra-small pores for chalcogenide memory cells | Raymond A. Turi | 2000-08-15 |
| 6097076 | Self-aligned isolation trench | David L. Chapek, Randhir P. S. Thakur | 2000-08-01 |
| 6096596 | Very high-density DRAM cell structure and method for fabricating it | — | 2000-08-01 |
| 6090727 | Method for local oxidation of silicon (LOCOS) field isolation | Mike Violette | 2000-07-18 |
| 6090693 | Transistors having controlled conductive spacers, uses of such transistors and methods of making such transistors | David Y. Kao | 2000-07-18 |
| 6087707 | Structure for an antifuse cell | Roger Lee | 2000-07-11 |
| 6072226 | Field isolation structure formed using ozone oxidation and tapering | Randhir P. S. Thakur, J. Brett Rolfson, John T. Moore | 2000-06-06 |
| 6066559 | Method for forming a semiconductor connection with a top surface having an enlarged recess | Guy T. Blalock, Kirk D. Prall | 2000-05-23 |
| 6064098 | Semiconductor processing methods of forming complementary metal oxide semiconductor memory and other circuitry, and memory and other circuitry | Jeffrey W. Honeycutt | 2000-05-16 |
| 6059879 | Method of forming semiconductor wafers, methods of treating semiconductor wafers to alleviate slip generation, ingots of semiconductive material, and wafers of semiconductive material | — | 2000-05-09 |
| 6054742 | Structure for cross coupled thin film transistors and static random access memory cell | — | 2000-04-25 |
| 6048778 | Gettering regions and methods of forming gettering regions within a semiconductor wafer | Jeffrey W. Honeycutt | 2000-04-11 |
| 6043151 | Method for forming a semiconductor connection with a top surface having an enlarged recess | Guy T. Blalock, Kirk D. Prall | 2000-03-28 |