Issued Patents All Time
Showing 251–275 of 314 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5863819 | Method of fabricating a DRAM access transistor with dual gate oxide technique | — | 1999-01-26 |
| 5854102 | Vertical diode structures with low series resistance | Tyler Lowrey, Trung T. Doan, Raymond A. Turi, Graham R. Wolstenholme | 1998-12-29 |
| 5846873 | Method of creating ultra-small nibble structures during mosfet fabrication | Michael P. Violette | 1998-12-08 |
| 5841150 | Stack/trench diode for use with a muti-state material in a non-volatile memory cell | Ray Turi | 1998-11-24 |
| 5831276 | Three-dimensional container diode for use with multi-state material in a non-volatile memory cell | Raymond A. Turi, Graham R. Wolstenholme, Charles L. Ingalls | 1998-11-03 |
| 5814527 | Method of making small pores defined by a disposable internal spacer for use in chalcogenide memories | Graham R. Wolstenholme, Steven T. Harshfield, Raymond A. Turi, Guy T. Blalock, Donwon Park | 1998-09-29 |
| 5773356 | Gettering regions and methods of forming gettering regions within a semiconductor wafer | Jeffrey W. Honeycutt | 1998-06-30 |
| 5763916 | Structure and method for improved storage node isolation | David Y. Kao | 1998-06-09 |
| 5753947 | Very high-density DRAM cell structure and method for fabricating it | — | 1998-05-19 |
| 5753956 | Semiconductor processing methods of forming complementary metal oxide semiconductor memory and other circuitry, and memory and other circuitry | Jeffrey W. Honeycutt | 1998-05-19 |
| 5751015 | Semiconductor reliability test chip | Tim J. Corbett, Raymond P. Scholer | 1998-05-12 |
| 5748527 | Nonvolatile memory having transistor redundancy | Roger Lee | 1998-05-05 |
| 5741735 | Local ground and V.sub.CC connection in an SRAM cell | Michael P. Violette | 1998-04-21 |
| 5714786 | Transistors having controlled conductive spacers, uses of such transistors and methods of making such transistors | David Y. Kao | 1998-02-03 |
| 5714414 | Semiconductor processing method of forming field isolation oxide relative to a semiconductor substrate | Roger Lee | 1998-02-03 |
| 5696025 | Method of forming guard ringed schottky diode | Michael P. Violette | 1997-12-09 |
| 5693971 | Combined trench and field isolation structure for semiconductor devices | — | 1997-12-02 |
| 5672539 | Method for forming an improved field isolation structure using ozone enhanced oxidation and tapering | Randhir P. S. Thakur, J. Brett Rolfson, John T. Moore | 1997-09-30 |
| 5654227 | Method for local oxidation of silicon (LOCOS) field isolation | Mike Violette | 1997-08-05 |
| 5646075 | Method for optimizing thermal budgets in fabricating semiconductors | Randhir P. S. Thakur | 1997-07-08 |
| 5640342 | Structure for cross coupled thin film transistors and static random access memory cell | — | 1997-06-17 |
| 5619454 | Programming method for healing over-erased cells for a flash memory device | Roger Lee | 1997-04-08 |
| 5608249 | Reduced area storage node junction | — | 1997-03-04 |
| 5600161 | Sub-micron diffusion area isolation with Si-SEG for a DRAM array | Angus C. Fox, III | 1997-02-04 |
| 5572461 | Static random access memory cell having a capacitor and a capacitor charge maintenance circuit | — | 1996-11-05 |