Issued Patents All Time
Showing 276–300 of 314 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5559742 | Flash memory having transistor redundancy | Roger Lee | 1996-09-24 |
| 5513137 | Flash memory having transistor redundancy | Roger Lee | 1996-04-30 |
| 5508959 | Programming method for the selective healing of over-erased cells on a flash erasable programmable read-only memory device | Roger Lee | 1996-04-16 |
| 5453396 | Sub-micron diffusion area isolation with SI-SEG for a DRAM array | Angus C. Fox, III | 1995-09-26 |
| 5439835 | Process for DRAM incorporating a high-energy, oblique P-type implant for both field isolation and punchthrough | — | 1995-08-08 |
| 5425392 | Method DRAM polycide rowline formation | Randhir P. S. Thakur, Annette L. Martin | 1995-06-20 |
| 5424993 | Programming method for the selective healing of over-erased cells on a flash erasable programmable read-only memory device | Roger Lee | 1995-06-13 |
| 5409858 | Method for optimizing thermal budgets in fabricating semiconductors | Randir P. S. Thakur | 1995-04-25 |
| 5397727 | Method of forming a floating gate programmable read only memory cell transistor | Roger Lee | 1995-03-14 |
| 5376566 | N-channel field effect transistor having an oblique arsenic implant for lowered series resistance | — | 1994-12-27 |
| 5323038 | Array of finned memory cell capacitors on a semiconductor substrate | Roger Lee | 1994-06-21 |
| 5312768 | Integrated process for fabricating raised, source/drain, short-channel transistors | — | 1994-05-17 |
| 5306951 | Sidewall silicidation for improved reliability and conductivity | Roger Lee, Tyler Lowrey | 1994-04-26 |
| 5292681 | Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors | Roger Lee, Tyler Lowrey, J. Dennis Keller | 1994-03-08 |
| 5262662 | Storage node capacitor having tungsten and etched tin storage node capacitor plate | Roger Lee | 1993-11-16 |
| 5257238 | Dynamic memory having access transistor turn-off state | Ruojia Lee | 1993-10-26 |
| 5252504 | Reverse polysilicon CMOS fabrication | Tyler Lowrey, Ruojia Lee | 1993-10-12 |
| 5250450 | Insulated-gate vertical field-effect transistor with high current drive and minimum overlap capacitance | Ruojia Lee | 1993-10-05 |
| 5244826 | Method of forming an array of finned memory cell capacitors on a semiconductor substrate | Roger Lee | 1993-09-14 |
| 5245569 | Semiconductor memory device with circuit for isolating arrayed memory cells, and method for isolating | Roger Lee | 1993-09-14 |
| 5234856 | Dynamic random access memory cell having a stacked-trench capacitor that is resistant to alpha particle generated soft errors, and method of manufacturing same | — | 1993-08-10 |
| 5229316 | Semiconductor processing method for forming substrate isolation trenches | Roger Lee | 1993-07-20 |
| 5227325 | Method of forming a capacitor | — | 1993-07-13 |
| 5208180 | Method of forming a capacitor | — | 1993-05-04 |
| 5198386 | Method of making stacked capacitors for DRAM cell | — | 1993-03-30 |