DH

David R. Hembree

Micron: 360 patents #9 of 6,345Top 1%
AI Aptina Imaging: 4 patents #62 of 332Top 20%
📍 Boise, ID: #4 of 3,546 inventorsTop 1%
🗺 Idaho: #5 of 8,810 inventorsTop 1%
Overall (All Time): #792 of 4,157,543Top 1%
366
Patents All Time

Issued Patents All Time

Showing 251–275 of 366 patents

Patent #TitleCo-InventorsDate
6296171 Utilize ultrasonic energy to reduce the initial contact forces in known-good-die or permanent contact systems Michael E. Hess, John O. Jacobson, Warren M. Farnworth, Alan G. Wood 2001-10-02
6297653 Interconnect and carrier with resistivity measuring contacts for testing semiconductor components 2001-10-02
6285202 Test carrier with force applying mechanism guide and terminal contact protector 2001-09-04
6285203 Test system having alignment member for aligning semiconductor components Salman Akram, Warren M. Farnworth, Michael E. Hess 2001-09-04
6279563 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions Salman Akram, Derek Gochnour, Michael E. Hess 2001-08-28
6277262 Method and apparatus for continuous processing of semiconductor wafers Salman Akram 2001-08-21
6274390 Method and apparatus providing redundancy for fabricating highly reliable memory modules Salman Akram, James M. Wark 2001-08-14
6275052 Probe card and testing method for semiconductor wafers Warren M. Farnworth, Salman Akram, Alan G. Wood, C. Patrick Doherty, Andrew J. Krivy 2001-08-14
6267650 Apparatus and methods for substantial planarization of solder bumps 2001-07-31
6263566 Flexible semiconductor interconnect fabricated by backslide thinning Derek Gochnour 2001-07-24
6255833 Method for testing semiconductor dice and chip scale packages Salman Akram, Alan G. Wood, Warren M. Farnworth 2001-07-03
6255840 Semiconductor package with wire bond protective member Salman Akram, Derek Gochnour, Warren M. Farnworth 2001-07-03
6255196 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions Salman Akram, Derek Gochnour, Michael E. Hess 2001-07-03
6250192 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions Salman Akram, Derek Gochnour, Michael E. Hess 2001-06-26
6246246 Test head assembly utilizing replaceable silicon contact 2001-06-12
6246245 Probe card, test method and test system for semiconductor wafers Salman Akram, C. Patrick Doherty, Warren M. Farnworth 2001-06-12
6242932 Interposer for semiconductor components having contact balls 2001-06-05
6242931 Flexible semiconductor interconnect fabricated by backside thinning Derek Gochnour 2001-06-05
6242103 Method for producing laminated film/metal structures Warren M. Farnworth 2001-06-05
6239590 Calibration target for calibrating semiconductor wafer test systems Andrew J. Krivy, Warren M. Farnworth, Salman Akram, James M. Wark, John O. Jacobson 2001-05-29
6229204 Chip on board with heat sink attachment 2001-05-08
6229324 Test system with mechanical alignment for semiconductor chip scale packages and dice Salman Akram, Warren M. Farnworth 2001-05-08
6229322 Electronic device workpiece processing apparatus and method of communicating signals within an electronic device workpiece processing apparatus 2001-05-08
6224713 Method and apparatus for ultrasonic wet etching of silicon Salman Akram 2001-05-01
6222379 Conventionally sized temporary package for testing semiconductor dice Warren M. Farnworth, Alan G. Wood, Salman Akram 2001-04-24