MK

Mark Kassab

MG Mentor Graphics: 34 patents #4 of 698Top 1%
SS Siemens Industry Software: 3 patents #27 of 391Top 7%
Nortel Networks Limited: 1 patents #2,518 of 5,294Top 50%
📍 Wilsonville, OR: #7 of 283 inventorsTop 3%
🗺 Oregon: #531 of 28,073 inventorsTop 2%
Overall (All Time): #40,462 of 4,157,543Top 1%
59
Patents All Time

Issued Patents All Time

Showing 26–50 of 59 patents

Patent #TitleCo-InventorsDate
8533547 Continuous application and decompression of test patterns and selective compaction of test responses Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee 2013-09-10
8499209 At-speed scan testing with controlled switching activity Janusz Rajski, Elham K. Moghaddam, Nilanjan Mukherjee, Xijiang Lin 2013-07-30
8290738 Low power scan testing techniques and apparatus Xijiang Lin, Dariusz Czysz, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer 2012-10-16
8108743 Method and apparatus for selectively compacting test responses Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee 2012-01-31
8051352 Timing-aware test generation and fault simulation Xijiang Lin, Kun-Han Tsai, Chen Wang, Janusz Rajski 2011-11-01
8024387 Method for synthesizing linear finite state machines Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee 2011-09-20
7984354 Generating responses to patterns stimulating an electronic circuit with timing exception paths Dhiraj Goswami, Kun-Han Tsai, Janusz Rajski 2011-07-19
7925465 Low power scan testing techniques and apparatus Xijiang Lin, Dariusz Czysz, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer 2011-04-12
7900104 Test pattern compression for an integrated circuit test environment Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer 2011-03-01
7877656 Continuous application and decompression of test patterns to a circuit-under-test Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer 2011-01-25
7865794 Decompressor/PRPG for applying pseudo-random and deterministic test patterns Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee 2011-01-04
7818644 Multi-stage test response compactors Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Wu-Tung Cheng 2010-10-19
7805649 Method and apparatus for selectively compacting test responses Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer 2010-09-28
7765450 Methods for distribution of test generation programs Jon Udell, Chen Wang, Janusz Rajski 2010-07-27
7669101 Methods for distributing programs for generating test data Jon Udell, Chen Wang, Janusz Rajski 2010-02-23
7555689 Generating responses to patterns stimulating an electronic circuit with timing exception paths Dhiraj Goswami, Kun-Han Tsai, Janusz Rajski 2009-06-30
7509546 Test pattern compression for an integrated circuit test environment Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer 2009-03-24
7506232 Decompressor/PRPG for applying pseudo-random and deterministic test patterns Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee 2009-03-17
7500163 Method and apparatus for selectively compacting test responses Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer 2009-03-03
7493540 Continuous application and decompression of test patterns to a circuit-under-test Jansuz Rajski, Jerzy Tyszer, Nilanjan Mukherjee 2009-02-17
7478296 Continuous application and decompression of test patterns to a circuit-under-test Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer 2009-01-13
7386778 Methods for distributing programs for generating test data Jon Udell, Chen Wang, Janusz Rajski 2008-06-10
7260591 Method for synthesizing linear finite state machines Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee 2007-08-21
7111209 Test pattern compression for an integrated circuit test environment Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer 2006-09-19
7093175 Decompressor/PRPG for applying pseudo-random and deterministic test patterns Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee 2006-08-15