{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Mentor Graphics", "item": "https://www.patentleaderboard.com/company/mentor-graphics"}, {"@type": "ListItem", "position": 3, "name": "Mark Kassab", "item": "https://www.patentleaderboard.com/inventor/fl:ma_ln:kassab-2"}]}

Home › Mentor Graphics › Mark Kassab

MK

Mark Kassab — 59 Patents

MGMentor Graphics: 34 patents #4 of 698Top 1%

SSSiemens Industry Software: 3 patents #27 of 391Top 7%

Nortel Networks Limited: 1 patents #2,518 of 5,294Top 50%

Wilsonville, OR: #7 of 283 inventorsTop 3%

Oregon: #536 of 28,073 inventorsTop 2%

Overall (All Time): #40,067 of 4,157,543Top 1%

59 Patents All Time

Mark Kassab has been granted 59 US patents while listed as an inventor at Mentor Graphics. The first was granted in 1994 and the most recent in May 2022. Mark Kassab ranks #40,067 of 4,157,543 US inventors in our database (top 0.96%). Patent records list Mark Kassab in Wilsonville, OR, US.

Patents per Year

Issued Patents All Time

Showing 51–59 of 59 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
6829740	Method and apparatus for selectively compacting test responses	Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer	2004-12-07
6708192	Method for synthesizing linear finite state machines	Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer	2004-03-16
6684358	Decompressor/PRPG for applying pseudo-random and deterministic test patterns	Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee	2004-01-27
6557129	Method and apparatus for selectively compacting test responses	Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee	2003-04-29
6543020	Test pattern compression for an integrated circuit test environment	Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer	2003-04-01
6539409	Method for synthesizing linear finite state machines	Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer	2003-03-25
6353842	Method for synthesizing linear finite state machines	Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee	2002-03-05
6327687	Test pattern compression for an integrated circuit test environment	Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee	2001-12-04
5313469	Self-testable digital integrator	Saman M. I. Adham, Janusz Rajski, Jerzy Tyszer	1994-05-17	$68,245,000