Issued Patents All Time
Showing 51–59 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6829740 | Method and apparatus for selectively compacting test responses | Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer | 2004-12-07 |
| 6708192 | Method for synthesizing linear finite state machines | Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer | 2004-03-16 |
| 6684358 | Decompressor/PRPG for applying pseudo-random and deterministic test patterns | Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee | 2004-01-27 |
| 6557129 | Method and apparatus for selectively compacting test responses | Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee | 2003-04-29 |
| 6543020 | Test pattern compression for an integrated circuit test environment | Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer | 2003-04-01 |
| 6539409 | Method for synthesizing linear finite state machines | Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer | 2003-03-25 |
| 6353842 | Method for synthesizing linear finite state machines | Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee | 2002-03-05 |
| 6327687 | Test pattern compression for an integrated circuit test environment | Janusz Rajski, Jerzy Tyszer, Nilanjan Mukherjee | 2001-12-04 |
| 5313469 | Self-testable digital integrator | Saman M. I. Adham, Janusz Rajski, Jerzy Tyszer | 1994-05-17 |