Issued Patents All Time
Showing 25 most recent of 131 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11815555 | Universal compactor architecture for testing circuits | Yingdi Liu, Nilanjan Mukherjee, Grzegorz Mrugalski, Jerzy Tyszer, Bartosz Wlodarczak | 2023-11-14 |
| 11585853 | Trajectory-optimized test pattern generation for built-in self-test | Grzegorz Mrugalski, Nilanjan Mukherjee, Lukasz Rybak, Jerzy Tyszer | 2023-02-21 |
| 11555854 | Deterministic stellar built-in self test | Yingdi Liu, Nilanjan Mukherjee, Jerzy Tyszer | 2023-01-17 |
| 11422188 | Isometric control data generation for test compression | Yu-Pei Huang, Sylwester Milewski | 2022-08-23 |
| 11232246 | Layout-friendly test pattern decompressor | Yu Huang, Mark Kassab, Nilanjan Mukherjee, Jeffrey Carl Mayer | 2022-01-25 |
| 11150299 | Flexible isometric decompressor architecture for test compression | Yu Huang, Sylwester Milewski, Jerzy Tyszer | 2021-10-19 |
| 11010523 | Prediction of test pattern counts for scan configuration determination | Yu Huang, Mark Kassab, Wu-Tung Cheng | 2021-05-18 |
| 10996273 | Test generation using testability-based guidance | Sylwester Milewski, Yu Huang | 2021-05-04 |
| 10963612 | Scan cell architecture for improving test coverage and reducing test application time | Nilanjan Mukherjee, Jedrzej Solecki | 2021-03-30 |
| 10955460 | Test scheduling and test access in test compression environment | Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Jakub Janicki, Jerzy Tyszer | 2021-03-23 |
| 10830815 | Signal probability-based test cube reordering and merging | Yu Huang | 2020-11-10 |
| 10788530 | Efficient and flexible network for streaming data in circuits | Jean-Francois Cote, Mark Kassab | 2020-09-29 |
| 10775436 | Streaming networks efficiency using data throttling | Jean-Francois Cote, Mark Kassab | 2020-09-15 |
| 10509072 | Test application time reduction using capture-per-cycle test points | Sylwester Milewski, Nilanjan Mukherjee, Jedrzej Solecki, Jerzy Tyszer, Justyna Zawada | 2019-12-17 |
| 10509073 | Timing-aware test generation and fault simulation | Xijiang Lin, Kun-Han Tsai, Mark Kassab, Chen Wang | 2019-12-17 |
| 10473721 | Data streaming for testing identical circuit blocks | Jean-Francois Cote, Mark Kassab | 2019-11-12 |
| 10476740 | Data generation for streaming networks in circuits | Jean-Francois Cote, Mark Kassab | 2019-11-12 |
| 10444282 | Test point insertion for low test pattern counts | Elham K. Moghaddam, Nilanjan Mukherjee, Jerzy Tyszer, Justyna Zawada | 2019-10-15 |
| 10379161 | Scan chain stitching for test-per-clock | Jedrzej Solecki, Jerzy Tyszer, Grzegorz Mrugalski | 2019-08-13 |
| 10361873 | Test point-enhanced hardware security | Nilanjan Mukherjee, Elham K. Moghaddam, Jerzy Tyszer, Justyna Zawada | 2019-07-23 |
| 10234506 | Continuous application and decompression of test patterns and selective compaction of test responses | Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee | 2019-03-19 |
| 10222420 | Transition test generation for detecting cell internal defects | Xijiang Lin, Wu-Tung Cheng | 2019-03-05 |
| 10120029 | Low power testing based on dynamic grouping of scan | Sylwester Milewski, Grzegorz Mrugalski, Jerzy Tyszer | 2018-11-06 |
| 10120024 | Multi-stage test response compactors | Jerzy Tyszer, Grzegorz Mrugalski, Mark Kassab, Wu-Tung Cheng | 2018-11-06 |
| 9933485 | Deterministic built-in self-test based on compressed test patterns stored on chip and their derivatives | Grzegorz Mrugalski, Lukasz Rybak, Jedrzej Solecki, Jerzy Tyszer | 2018-04-03 |