Issued Patents All Time
Showing 1–25 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11815555 | Universal compactor architecture for testing circuits | Yingdi Liu, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, Bartosz Wlodarczak | 2023-11-14 |
| 11585853 | Trajectory-optimized test pattern generation for built-in self-test | Nilanjan Mukherjee, Janusz Rajski, Lukasz Rybak, Jerzy Tyszer | 2023-02-21 |
| 11423202 | Suspect resolution for scan chain defect diagnosis | Szczepan Urban, Jakub Janicki | 2022-08-23 |
| 10955460 | Test scheduling and test access in test compression environment | Mark Kassab, Nilanjan Mukherjee, Janusz Rajski, Jakub Janicki, Jerzy Tyszer | 2021-03-23 |
| 10379161 | Scan chain stitching for test-per-clock | Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer | 2019-08-13 |
| 10120024 | Multi-stage test response compactors | Janusz Rajski, Jerzy Tyszer, Mark Kassab, Wu-Tung Cheng | 2018-11-06 |
| 10120029 | Low power testing based on dynamic grouping of scan | Janusz Rajski, Sylwester Milewski, Jerzy Tyszer | 2018-11-06 |
| 9933485 | Deterministic built-in self-test based on compressed test patterns stored on chip and their derivatives | Janusz Rajski, Lukasz Rybak, Jedrzej Solecki, Jerzy Tyszer | 2018-04-03 |
| 9874606 | Selective per-cycle masking of scan chains for system level test | Janusz Rajski, Dariusz Czysz, Nilanjan Mukherjee | 2018-01-23 |
| 9778316 | Multi-stage test response compactors | Janusz Rajski, Jerzy Tyszer, Mark Kassab, Wu-Tung Cheng | 2017-10-03 |
| 9714981 | Test-per-clock based on dynamically-partitioned reconfigurable scan chains | Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer | 2017-07-25 |
| 9377508 | Selective per-cycle masking of scan chains for system level test | Janusz Rajski, Dariusz Czysz, Nilanjan Mukherjee, Jerzy Tyszer | 2016-06-28 |
| 9347993 | Test generation for test-per-clock | Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer | 2016-05-24 |
| 9335377 | Test-per-clock based on dynamically-partitioned reconfigurable scan chains | Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer | 2016-05-10 |
| 9088522 | Test scheduling with pattern-independent test access mechanism | Janusz Rajski, Mark Kassab, Nilanjan Mukherjee, Jakub Janicki, Jerzy Tyszer +1 more | 2015-07-21 |
| 9009553 | Scan chain configuration for test-per-clock based on circuit topology | Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer | 2015-04-14 |
| 9003248 | Fault-driven scan chain configuration for test-per-clock | Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer | 2015-04-07 |
| 8832512 | Low power compression of incompatible test cubes | Dariusz Czysz, Nilanjan Mukherjee, Janusz Rajski, Przemyslaw Szczerbicki, Jerzy Tyszer | 2014-09-09 |
| 8726113 | Selective per-cycle masking of scan chains for system level test | Janusz Rajski, Dariusz Czysz, Nilanjan Mukherjee, Jerzy Tyszer | 2014-05-13 |
| 8683280 | Test generator for low power built-in self-test | Janusz Rajski, Jerzy Tyszer, Benoit Nadeau-Dostie | 2014-03-25 |
| 8347159 | Compression based on deterministic vector clustering of incompatible test cubes | Nilanjan Mukherjee, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer | 2013-01-01 |
| 8301945 | Decompressors for low power decompression of test patterns | Janusz Rajski, Dariusz Czysz, Jerzy Tyszer | 2012-10-30 |
| 8290738 | Low power scan testing techniques and apparatus | Xijiang Lin, Dariusz Czysz, Mark Kassab, Janusz Rajski, Jerzy Tyszer | 2012-10-16 |
| 8166359 | Selective per-cycle masking of scan chains for system level test | Janusz Rajski, Dariusz Czysz, Nilanjan Mukherjee, Jerzy Tyszer | 2012-04-24 |
| 8086923 | Accurately identifying failing scan bits in compression environments | Wu-Tung Cheng | 2011-12-27 |