AS

Arkadii V. Samoilov

MP Maxim Integrated Products: 43 patents #1 of 945Top 1%
Applied Materials: 26 patents #456 of 7,310Top 7%
QU Qualcomm: 2 patents #5,578 of 12,104Top 50%
📍 Saratoga, CA: #101 of 2,933 inventorsTop 4%
🗺 California: #4,078 of 386,348 inventorsTop 2%
Overall (All Time): #27,248 of 4,157,543Top 1%
73
Patents All Time

Issued Patents All Time

Showing 26–50 of 73 patents

Patent #TitleCo-InventorsDate
9105750 Semiconductor device having a through-substrate via Tyler Parent, Xuejun Ying 2015-08-11
9099345 Enhanced WLP for superior temp cycling, drop test and high current applications Rey Alvarado, Tie Wang 2015-08-04
9093333 Integrated circuit device having extended under ball metallization Yong Li Xu, Duane Thomas Wilcoxen, Yi-Sheng Anthony Sun, Viren Khandekar 2015-07-28
9087779 Multi-die, high current wafer level package Peter R. Harper, Viren Khandekar, Pirooz Parvarandeh 2015-07-21
9087732 Wafer-level package device having solder bump assemblies that include an inner pillar structure Yong Li Xu, Viren Khandekar, Yi-Sheng Anthony Sun 2015-07-21
8803068 Light sensor having a contiguous IR suppression filter and a transparent substrate Nicole D. Kerness, Zhihai Wang, Joy T. Jones 2014-08-12
8791404 Light sensor having a transparent substrate, a contiguous IR suppression filter and through-substrate vias Nicole D. Kerness, Zhihai Wang, Joy T. Jones 2014-07-29
8779540 Light sensor having transparent substrate with lens formed therein Nicole D. Kerness, Zhihai Wang, Joy T. Jones 2014-07-15
8749007 Light sensor having transparent substrate and diffuser formed therein Nicole D. Kerness, Zhihai Wang, Joy T. Jones 2014-06-10
8748232 Semiconductor device having a through-substrate via Tyler Parent, Larry Wang 2014-06-10
8742574 Semiconductor device having a through-substrate via Tyler Parent, Xuejun Ying 2014-06-03
8692367 Wafer-level packaged device having self-assembled resilient leads Chiung C. Lo, Reynante Tamunan Alvarado 2014-04-08
8686560 Wafer-level chip-scale package device having bump assemblies configured to mitigate failures due to stress Pirooz Parvarandeh, Reynante Tamunan Alvarado, Chiung C. Lo 2014-04-01
8643150 Wafer-level package device having solder bump assemblies that include an inner pillar structure Yong Li Xu, Viren Khandekar, Yi-Sheng Anthony Sun 2014-02-04
8586456 Use of CL2 and/or HCL during silicon epitaxial film formation Zhiyuan Ye, Yihwan Kim, Xiaowei Li, Ali Zojaji, Nicholas C. Dalida +2 more 2013-11-19
8575493 Integrated circuit device having extended under ball metallization Yong Li Xu, Duane Thomas Wilcoxen, Yi-Sheng Anthony Sun, Viren Khandekar 2013-11-05
8492284 Low temperature etchant for treatment of silicon-containing surfaces 2013-07-23
8445389 Etchant treatment processes for substrate surfaces and chamber surfaces Ali Zojaji 2013-05-21
8405115 Light sensor using wafer-level packaging Albert Bergemont, Chiung C. Lo, Prashanth S. Holenarsipur, James Patrick Long 2013-03-26
8278748 Wafer-level packaged device having self-assembled resilient leads Chiung C. Lo, Reynante Tamunan Alvarado 2012-10-02
8264089 Enhanced WLP for superior temp cycling, drop test and high current applications Rey Alvarado, Tie Wang 2012-09-11
8259464 Wafer level package (WLP) device having bump assemblies including a barrier metal Tiao Zhou 2012-09-04
8093154 Etchant treatment processes for substrate surfaces and chamber surfaces Ali Zojaji 2012-01-10
8084871 Redistribution layer enhancement to improve reliability of wafer level packaging S. Kaysar Rahim, Tiao Zhou, Viren Khandekar, Yong Li Xu 2011-12-27
7960256 Use of CL2 and/or HCL during silicon epitaxial film formation Zhiyuan Ye, Yihwan Kim, Xiaowei Li, Ali Zojaji, Nicholas C. Dalida +2 more 2011-06-14