PU

Prasanti Uppaluri

KL Kla: 6 patents #58 of 758Top 8%
KL Kla-Tencor: 6 patents #245 of 1,394Top 20%
CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
Overall (All Time): #307,822 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12299848 Deep learning image denoising for semiconductor-based applications Aditya Gulati, Raghavan Konuru, Niveditha Lakshmi Narasimhan, Saravanan Paramasivam, Martin Plihal 2025-05-13
11676264 System and method for determining defects using physics-based image perturbations Martin Plihal, Saravanan Paramasivam, Jacob George, Niveditha Lakshmi Narasimhan, Sairam Ravu +1 more 2023-06-13
11410291 System and method for generation of wafer inspection critical areas Rajesh Manepalli, Ashok Kulkarni, Saibal Banerjee, John Kirkland 2022-08-09
11379967 Methods and systems for inspection of semiconductor structures with automatically generated defect features Jacob George, Saravanan Paramasivam, Martin Plihal, Niveditha Lakshmi Narasimhan, Sairam Ravu 2022-07-05
11379969 Method for process monitoring with optical inspections Martin Plihal, Saravanan Paramasivam 2022-07-05
11237119 Diagnostic methods for the classifiers and the defects captured by optical tools Martin Plihal, Erfan Soltanmohammadi, Saravanan Paramasivam, Sairam Ravu, Ankit Jain +1 more 2022-02-01
11114324 Defect candidate generation for inspection Martin Plihal, Erfan Soltanmohammadi, Mohit Jani, Chris Maher 2021-09-07
10706522 System and method for generation of wafer inspection critical areas Rajesh Manepalli, Ashok Kulkarni, Saibal Banerjee, John Kirkland 2020-07-07
10670536 Mode selection for inspection Martin Plihal, Saravanan Paramasivam, Ankit Jain, Raghavan Konuru 2020-06-02
10620134 Creating defect samples for array regions Vidyasagar Anantha, Manikandan Mariyappan, Raghav Babulnath, Gangadharan Sivaraman, Satya Kurada +2 more 2020-04-14
10267748 Optimizing training sets used for setting up inspection-related algorithms Martin Plihal, Erfan Soltanmohammadi, Saravanan Paramasivam, Sairam Ravu, Ankit Jain +1 more 2019-04-23
10209628 System and method for defect classification based on electrical design intent Thirupurasundari Jayaraman, Ardis Liang, Srikanth Kandukuri, Sagar A. Kekare 2019-02-19
8397194 Layout versus schematic error system and method Doug Den Dulk 2013-03-12
8209656 Pattern decomposition method Xiaojun Wang, Yuane Qiu, Judy Huckabay, Tianhao Zhang 2012-06-26
8181137 Layout versus schematic error system and method Doug Den Dulk 2012-05-15