Issued Patents All Time
Showing 76–100 of 400 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12009820 | Asynchronous consensus circuit with majority gate based on non-linear capacitors | Amrita Mathuriya, Nabil Imam, Ikenna Odinaka, Rafael Rios, Rajeev Kumar Dokania | 2024-06-11 |
| 12009018 | Transition metal dichalcogenide based spin orbit torque memory device | Chia-Ching Lin, Tanay Gosavi, Dmitri E. Nikonov, Benjamin Buford, Kaan Oguz +2 more | 2024-06-11 |
| 12001266 | Method and apparatus for managing power of ferroelectric or paraelectric logic and CMOS based logic | Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Debo Olaosebikan | 2024-06-04 |
| 12001941 | Wireless oscillator neural network | Dmitri E. Nikonov, Ian A. Young | 2024-06-04 |
| 11997853 | 1TnC memory bit-cell having stacked and folded planar capacitors with lateral offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-05-28 |
| 11996438 | Pocket flow for trench capacitors integrated with planar capacitors on a same substrate and method of fabrication | Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya +3 more | 2024-05-28 |
| 11990899 | Multi-level spin logic | Ian A. Young, Dmitri E. Nikonov, Uygar E. Avci, Patrick Morrow, Anurag Chaudhry | 2024-05-21 |
| 11985832 | Planar and trench capacitors with hydrogen barrier dielectric for logic and memory applications | Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya +3 more | 2024-05-14 |
| 11985831 | Multi-function threshold gate with input based adaptive threshold and with stacked non-planar ferroelectric capacitors | Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Rajeev Kumar Dokania, Debo Olaosebikan | 2024-05-14 |
| 11979148 | Asynchronous consensus circuit with stacked linear or paraelectric planar capacitors | Amrita Mathuriya, Nabil Imam, Ikenna Odinaka, Rafael Rios, Rajeev Kumar Dokania | 2024-05-07 |
| 11978762 | Planar capacitors with non-linear polar material staggered on a shared electrode | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-05-07 |
| 11967954 | Majority or minority logic gate with non-linear input capacitors without reset | Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Darshak Doshi, Rajeev Kumar Dokania | 2024-04-23 |
| 11961877 | Dual hydrogen barrier layer for trench capacitors integrated with low density film for logic structures | Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya +3 more | 2024-04-16 |
| 11955512 | Dual hydrogen barrier layer for trench capacitors integrated with low density film for logic structures and methods of fabrication | Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya +3 more | 2024-04-09 |
| 11955153 | Multi-element gain memory bit-cell having stacked and folded planar memory elements with and without offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-04-09 |
| 11949018 | Doped polar layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Gaurav Thareja | 2024-04-02 |
| 11949017 | Doped polar layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Gaurav Thareja | 2024-04-02 |
| 11942133 | Pedestal-based pocket integration process for embedded memory | Noriyuki Sato, Tanay Gosavi, Niloy Mukherjee, Amrita Mathuriya, Rajeev Kumar Dokania | 2024-03-26 |
| 11922105 | Computer-aided design tool for minimum gate count initialization | Ikenna Odinaka, Darshak Doshi, Rajeev Kumar Dokania, Amrita Mathuriya | 2024-03-05 |
| 11916149 | Doped polar layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Gaurav Thareja | 2024-02-27 |
| 11910618 | Multi-element ferroelectric gain memory bit-cell having stacked and folded non-planar capacitors | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-02-20 |
| 11909391 | Asynchronous completion tree circuit using multi-function threshold gate with input based adaptive threshold | Amrita Mathuriya, Nabil Imam, Ikenna Odinaka, Rafael Rios, Rajeev Kumar Dokania | 2024-02-20 |
| 11908943 | Manganese-doped perovskite layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Gaurav Thareja | 2024-02-20 |
| 11908704 | Method of fabricating a perovskite-material based planar capacitor using rapid thermal annealing (RTA) methodologies | Niloy Mukherjee, Somilkumar J. Rathi, Jason Y. Wu, Pratyush Pandey, Zeying Ren +8 more | 2024-02-20 |
| 11903219 | Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-02-13 |