Issued Patents All Time
Showing 126–150 of 400 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11844225 | Dual hydrogen barrier layer for memory devices integrated with low density film for logic structures and methods of fabrication | Noriyuki Sato, Niloy Mukherjee, Mauricio Manfrini, Tanay Gosavi, Rajeev Kumar Dokania +2 more | 2023-12-12 |
| 11839088 | Integrated via and bridge electrodes for memory array applications and methods of fabrication | Noriyuki Sato, Niloy Mukherjee, Mauricio Manfrini, Tanay Gosavi, Rajeev Kumar Dokania +2 more | 2023-12-05 |
| 11837664 | Doped polar layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Gaurav Thareja | 2023-12-05 |
| 11839070 | High density dual encapsulation materials for capacitors and methods of fabrication | Noriyuki Sato, Niloy Mukherjee, Mauricio Manfrini, Tanay Gosavi, Rajeev Kumar Dokania +2 more | 2023-12-05 |
| 11836102 | Low latency and high bandwidth artificial intelligence processor | Amrita Mathuriya, Rajeev Kumar Dokania, Ananda Samajdar | 2023-12-05 |
| 11837268 | Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors with lateral offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2023-12-05 |
| 11829699 | Method to segregate logic and memory into separate dies for thermal management in a multi-dimensional packaging | Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Debo Olaosebikan | 2023-11-28 |
| 11832451 | High density ferroelectric random access memory (FeRAM) devices and methods of fabrication | Debraj Guhabiswas, Maria Isabel Perez, Jason Y. Wu, James David Clarkson, Gabriel Antonio Paulius Velarde +4 more | 2023-11-28 |
| 11823725 | Apparatus and method for endurance of non-volatile memory banks via multi-level wear leveling | Christopher B. Wilkerson, Rajeev Kumar Dokania, Amrita Mathuriya | 2023-11-21 |
| 11818963 | Nano-rod spin orbit coupling based magnetic random access memory with shape induced perpendicular magnetic anisotropy | Kaan Oguz, Chia-Ching Lin, Christopher J. Wiegand, Tanay Gosavi, Ian A. Young | 2023-11-14 |
| 11817140 | Reading scheme for 1TNC ferroelectric memory bit-cell with plate-line parallel to bit-line and with individual switches and control on plate-lines of the bit-cell | Rajeev Kumar Dokania, Amrita Mathuriya | 2023-11-14 |
| 11817859 | Asynchronous circuit with multi-input threshold gate logic and 1-input threshold gate | Nabil Imam, Ikenna Odinaka, Rafael Rios, Rajeev Kumar Dokania, Amrita Mathuriya | 2023-11-14 |
| 11818897 | Method of forming a stack of planar capacitors including capacitors with non-linear polar material and linear dielectric for common mode compensation in a memory bit-cell | Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya | 2023-11-14 |
| 11816408 | Computer-aided design tool for majority or minority inverter graph synthesis | Ikenna Odinaka, Darshak Doshi, Rajeev Kumar Dokania, Amrita Mathuriya | 2023-11-14 |
| 11809801 | Computer-aided design tool for circuit logic initialization | Ikenna Odinaka, Darshak Doshi, Rajeev Kumar Dokania, Amrita Mathuriya | 2023-11-07 |
| 11810608 | Manganese or scandium doped multi-element non-linear polar material gain memory bit-cell | Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more | 2023-11-07 |
| 11800722 | Common mode compensation for non-linear polar material based differential memory bit-cell having one transistor and multiple capacitors | Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya | 2023-10-24 |
| 11790969 | Apparatus and method for endurance of non-volatile memory banks via outlier compensation | Christopher B. Wilkerson, Rajeev Kumar Dokania, Amrita Mathuriya | 2023-10-17 |
| 11790972 | Writing scheme for multi-element gain ferroelectric memory bit-cell with plate-lines parallel to a bit-line and with individual switches and control on the plate-lines of the bit-cell | Rajeev Kumar Dokania, Amrita Mathuriya | 2023-10-17 |
| 11792998 | Process integration flow for embedded memory with multi-pocket masks for decoupling processing of memory areas from non-memory areas | Noriyuki Sato, Tanay Gosavi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya | 2023-10-17 |
| 11792997 | Common mode compensation for differential multi-element non-linear polar material based gain memory bit-cell | Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya | 2023-10-17 |
| 11791233 | Ferroelectric or paraelectric memory and logic chiplet with thermal management in a multi-dimensional packaging | Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Debo Olaosebikan | 2023-10-17 |
| 11784164 | 3D stacked compute and memory with copper-to-copper hybrid bond | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan | 2023-10-10 |
| 11785782 | Embedded memory with encapsulation layer adjacent to a memory stack | Noriyuki Sato, Tanay Gosavi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya | 2023-10-10 |
| 11777504 | Non-linear polar material based latch | Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Rafael Rios | 2023-10-03 |