Issued Patents All Time
Showing 51–75 of 400 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12118327 | Ripple carry adder with inverted ferroelectric or paraelectric based adders | Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Rafael Rios | 2024-10-15 |
| 12118330 | Low power multiplier with non-linear polar material based reset mechanism with sequential reset | Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Rajeev Kumar Dokania | 2024-10-15 |
| 12113097 | Ferroelectric capacitor integrated with logic | Gaurav Thareja, Rajeev Kumar Dokania, Ramamoorthy Ramesh, Amrita Mathuriya | 2024-10-08 |
| 12107579 | Method for conditioning majority or minority gate | Rajeev Kumar Dokania, Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Robert Menezes +1 more | 2024-10-01 |
| 12108607 | Devices with continuous electrode plate and methods of fabrication | Noriyuki Sato, Debraj Guhabiswas, Tanay Gosavi, Niloy Mukherjee, Amrita Mathuriya | 2024-10-01 |
| 12108608 | Memory devices with dual encapsulation layers and methods of fabrication | Noriyuki Sato, Debraj Guhabiswas, Tanay Gosavi, Niloy Mukherjee, Amrita Mathuriya | 2024-10-01 |
| 12108609 | Memory bit-cell with stacked and folded planar capacitors | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-10-01 |
| 12094923 | Rapid thermal annealing (RTA) methodologies for integration of perovskite-material based memory devices | Niloy Mukherjee, Somilkumar J. Rathi, Jason Y. Wu, Pratyush Pandey, Zeying Ren +8 more | 2024-09-17 |
| 12096638 | One transistor and N memory element based memory bit-cell having stacked and folded planar memory elements with and without offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-09-17 |
| 12094511 | Write disturb mitigation for column multiplexed non-linear polar material based multi-capacitor bit-cell | Rajeev Kumar Dokania, Mustansir Yunus Mukadam, Tanay Gosavi, James David Clarkson, Neal Reynolds +1 more | 2024-09-17 |
| 12086410 | Ferroelectric memory chiplet in a multi-dimensional packaging with I/O switch embedded in a substrate or interposer | Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Debo Olaosebikan | 2024-09-10 |
| 12087730 | Multi-input threshold gate having stacked and folded planar capacitors with and without offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-09-10 |
| 12088297 | Majority gate based low power ferroelectric based adder with reset mechanism | Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja, Ramamoorthy Ramesh +1 more | 2024-09-10 |
| 12079475 | Ferroelectric memory chiplet in a multi-dimensional packaging | Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Debo Olaosebikan | 2024-09-03 |
| 12069866 | Pocket integration process for embedded memory | Noriyuki Sato, Tanay Gosavi, Niloy Mukherjee, Amrita Mathuriya, Rajeev Kumar Dokania | 2024-08-20 |
| 12062584 | Iterative method of multilayer stack development for device applications | Niloy Mukherjee, Noriyuki Sato, Tanay Gosavi, Mauricio Manfrini, Somilkumar J. Rathi +4 more | 2024-08-13 |
| 12041785 | 1TnC memory bit-cell having stacked and folded non-planar capacitors | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato | 2024-07-16 |
| 12034086 | Trench capacitors with continuous dielectric layer and methods of fabrication | Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya +3 more | 2024-07-09 |
| 12029043 | Planar and trench capacitors with hydrogen barrier dielectric for logic and memory applications and methods of fabrication | Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya +3 more | 2024-07-02 |
| 12026034 | Method and apparatus for heuristic-based power gating of non-CMOS logic and CMOS based logic | Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Debo Olaosebikan | 2024-07-02 |
| 12022662 | Planar and trench capacitors for logic and memory applications and methods of fabrication | Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya +3 more | 2024-06-25 |
| 12019492 | Method and apparatus for managing power in a multi-dimensional packaging | Amrita Mathuriya, Christopher B. Wilkerson, Rajeev Kumar Dokania, Debo Olaosebikan | 2024-06-25 |
| 12016185 | Planar and trench capacitors for logic and memory applications | Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya +3 more | 2024-06-18 |
| 12015402 | Asynchronous consensus circuit with stacked ferroelectric non-planar capacitors | Amrita Mathuriya, Nabil Imam, Ikenna Odinaka, Rafael Rios, Rajeev Kumar Dokania | 2024-06-18 |
| 12010854 | Multi-level hydrogen barrier layers for memory applications and methods of fabrication | Noriyuki Sato, Niloy Mukherjee, Mauricio Manfrini, Tanay Gosavi, Rajeev Kumar Dokania +2 more | 2024-06-11 |