Issued Patents All Time
Showing 25 most recent of 90 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12308837 | Multiplier with non-linear polar material | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2025-05-20 |
| 12272675 | Method of forming 3D stacked compute and memory with copper pillars | Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya | 2025-04-08 |
| 12262543 | High density ferroelectric random access memory (FeRAM) devices and methods of fabrication | Debraj Guhabiswas, Maria Isabel Perez, Jason Y. Wu, James David Clarkson, Gabriel Antonio Paulius Velarde +4 more | 2025-03-25 |
| 12223992 | High-density low voltage ferroelectric differential memory bit-cell with shared plate- line | Sasikanth Manipatruni, Rajeev Kumar Dokania | 2025-02-11 |
| 12200941 | Pillar capacitor and method of fabricating such | Gaurav Thareja, Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya | 2025-01-14 |
| 12137574 | Integration of ferroelectric memory devices having stacked electrodes with transistors | Sasikanth Manipatruni, Rajeev Kumar Dokania, Gaurav Thareja, Amrita Mathuriya | 2024-11-05 |
| 12126339 | Apparatus with selectable majority gate and combinational logic gate outputs | Sasikanth Manipatruni, Rafael Rios, Ikenna Odinaka, Robert Menezes, Rajeev Kumar Dokania +1 more | 2024-10-22 |
| 12113097 | Ferroelectric capacitor integrated with logic | Gaurav Thareja, Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya | 2024-10-08 |
| 12107579 | Method for conditioning majority or minority gate | Rajeev Kumar Dokania, Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Robert Menezes +1 more | 2024-10-01 |
| 12094923 | Rapid thermal annealing (RTA) methodologies for integration of perovskite-material based memory devices | Niloy Mukherjee, Somilkumar J. Rathi, Jason Y. Wu, Pratyush Pandey, Zeying Ren +8 more | 2024-09-17 |
| 12088297 | Majority gate based low power ferroelectric based adder with reset mechanism | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2024-09-10 |
| 11908704 | Method of fabricating a perovskite-material based planar capacitor using rapid thermal annealing (RTA) methodologies | Niloy Mukherjee, Somilkumar J. Rathi, Jason Y. Wu, Pratyush Pandey, Zeying Ren +8 more | 2024-02-20 |
| 11894417 | Method of fabricating a perovskite-material based trench capacitor using rapid thermal annealing (RTA) methodologies | Niloy Mukherjee, Somilkumar J. Rathi, Jason Y. Wu, Pratyush Pandey, Zeying Ren +8 more | 2024-02-06 |
| 11863183 | Low power non-linear polar material based threshold logic gate multiplier | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2024-01-02 |
| 11832451 | High density ferroelectric random access memory (FeRAM) devices and methods of fabrication | Debraj Guhabiswas, Maria Isabel Perez, Jason Y. Wu, James David Clarkson, Gabriel Antonio Paulius Velarde +4 more | 2023-11-28 |
| 11769790 | Rapid thermal annealing (RTA) methodologies for integration of perovskite-material based trench capacitors | Niloy Mukherjee, Somilkumar J. Rathi, Jason Y. Wu, Pratyush Pandey, Zeying Ren +8 more | 2023-09-26 |
| 11764790 | Majority logic gate having paraelectric input capacitors coupled to a conditioning scheme | Rajeev Kumar Dokania, Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Robert Menezes +1 more | 2023-09-19 |
| 11764190 | 3D stacked compute and memory with copper pillars | Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya | 2023-09-19 |
| 11758738 | Integration of ferroelectric memory devices with transistors | Sasikanth Manipatruni, Rajeev Kumar Dokania, Gaurav Thareja, Amrita Mathuriya | 2023-09-12 |
| 11744081 | Ferroelectric device film stacks with texturing layer which is part of a bottom electrode, and method of forming such | Niloy Mukherjee, Sasikanth Manipatruni, James David Clarkson, FNU Atiquzzaman, Gabriel Antonio Paulius Velarde +1 more | 2023-08-29 |
| 11742860 | Fabrication of a majority logic gate having non-linear input capacitors | Sasikanth Manipatruni, Rafael Rios, Neal Reynolds, Ikenna Odinaka, Robert Menezes +2 more | 2023-08-29 |
| 11716858 | Ferroelectric device film stacks with texturing layer which is part of a bottom electrode and a barrier, and method of forming such | Niloy Mukherjee, Sasikanth Manipatruni, James David Clarkson, FNU Atiquzzaman, Gabriel Antonio Paulius Velarde +1 more | 2023-08-01 |
| 11711083 | Majority gate based low power ferroelectric based adder with reset mechanism | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Guarav Thareja +1 more | 2023-07-25 |
| 11705906 | Majority logic gate having ferroelectric input capacitors and a pulsing scheme coupled to a conditioning logic | Rajeev Kumar Dokania, Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Robert Menezes +1 more | 2023-07-18 |
| 11659714 | Ferroelectric device film stacks with texturing layer, and method of forming such | Niloy Mukherjee, Sasikanth Manipatruni, James David Clarkson, FNU Atiquzzaman, Gabriel Antonio Paulius Velarde +1 more | 2023-05-23 |