Issued Patents All Time
Showing 126–150 of 153 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9608059 | Semiconductor device with isolated body portion | Annalisa Cappellani, Stephen M. Cea, Tahir Ghani, Harry Gomez, Jack T. Kavalieros +5 more | 2017-03-28 |
| 9595581 | Silicon and silicon germanium nanowire structures | Kelin J. Kuhn, Seiyon Kim, Stephen M. Cea, Martin D. Giles, Annalisa Cappellani +3 more | 2017-03-14 |
| 9583602 | Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs | Roza Kotlyar, Stephen M. Cea, Gilbert Dewey, Benjamin Chu-Kung, Uygar E. Avci +4 more | 2017-02-28 |
| 9583491 | CMOS nanowire structure | Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Annalisa Cappellani +2 more | 2017-02-28 |
| 9583487 | Semiconductor device having metallic source and drain regions | Martin D. Giles, Annalisa Cappellani, Sanaz Kabehie, Cory E. Weber, Aaron A. Budrevich | 2017-02-28 |
| 9564522 | Nanowire structures having non-discrete source and drain regions | Stephen M. Cea, Annalisa Cappellani, Martin D. Giles, Seiyon Kim, Kelin J. Kuhn | 2017-02-07 |
| 9490780 | Apparatuses, methods, and systems for dense circuitry using tunnel field effect transistors | Daniel H. Morris, Uygar E. Avci, Ian A. Young | 2016-11-08 |
| 9484447 | Integration methods to fabricate internal spacers for nanowire devices | Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Mark Armstrong +2 more | 2016-11-01 |
| 9425212 | Isolated and bulk semiconductor devices formed on a same bulk substrate | Annalisa Cappellani, Kelin J. Kuhn, Harry Gomez | 2016-08-23 |
| 9412872 | N-type and P-type tunneling field effect transistors (TFETs) | Roza Kotlyar, Stephen M. Cea, Gilbert Dewey, Benjamin Chu-Kung, Uygar E. Avci +4 more | 2016-08-09 |
| 9362074 | Nanowire-based mechanical switching device | Chytra Pawashe, Kevin Lin, Anurag Chaudhry, Raseong Kim, Seiyon Kim +3 more | 2016-06-07 |
| 9224810 | CMOS nanowire structure | Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Annalisa Cappellani +2 more | 2015-12-29 |
| 9129829 | Silicon and silicon germanium nanowire structures | Kelin J. Kuhn, Seiyon Kim, Stephen M. Cea, Martin D. Giles, Annalisa Cappellani +3 more | 2015-09-08 |
| 9087863 | Nanowire structures having non-discrete source and drain regions | Stephen M. Cea, Annalisa Cappellani, Martin D. Giles, Seiyon Kim, Kelin J. Kuhn | 2015-07-21 |
| 9029221 | Semiconductor devices having three-dimensional bodies with modulated heights | Annalisa Cappellani, Kelin J. Kuhn, Aura Cecilia Davila Latorre, Tahir Ghani | 2015-05-12 |
| 8890120 | Tunneling field effect transistors (TFETs) for CMOS approaches to fabricating N-type and P-type TFETs | Roza Kotlyar, Stephen M. Cea, Gilbert Dewey, Benjamin Chu-Kung, Uygar E. Avci +4 more | 2014-11-18 |
| 8853741 | Junctionless accumulation-mode devices on decoupled prominent architectures | Annalisa Cappellani, Kelin J. Kuhn, Titash Rakshit, Sivakumar Mudanai | 2014-10-07 |
| 8753942 | Silicon and silicon germanium nanowire structures | Kelin J. Kuhn, Seiyon Kim, Stephen M. Cea, Martin D. Giles, Annalisa Cappellani +3 more | 2014-06-17 |
| 8507948 | Junctionless accumulation-mode devices on prominent architectures, and methods of making same | Annalisa Cappellani, Kelin J. Kuhn, Titash Rakshit, Sivakumar Mudanai | 2013-08-13 |
| 8273626 | Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication | Scott A. Hareland, Robert S. Chau, Brian S. Doyle, Tom Linton, Suman Datta | 2012-09-25 |
| 7973389 | Isolated tri-gate transistor fabricated on bulk substrate | Jack T. Kavalieros, Stephen M. Cea | 2011-07-05 |
| 7820513 | Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication | Scott A. Hareland, Robert S. Chau, Brian S. Doyle, Tom Linton, Suman Datta | 2010-10-26 |
| 7456476 | Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication | Scott A. Hareland, Robert S. Chau, Brian S. Doyle, Tom Linton, Suman Datta | 2008-11-25 |
| 7091560 | Method and structure to decrease area capacitance within a buried insulator device | Mark Stettler, Borna J. Obradovic, Martin D. Giles | 2006-08-15 |
| 6960517 | N-gate transistor | Brian S. Doyle, Thomas D. Linton, Jack T. Kavalieros | 2005-11-01 |