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Self aligned active trench contact |
— |
2020-05-26 |
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Self aligned active trench contact |
— |
2018-11-20 |
| 9640539 |
Self aligned active trench contact |
— |
2017-05-02 |
| 9245894 |
Self aligned active trench contact |
— |
2016-01-26 |
| 8728945 |
Method for patterning sublithographic features |
— |
2014-05-20 |
| 7250334 |
Metal insulator metal (MIM) capacitor fabrication with sidewall spacers and aluminum cap (ALCAP) top electrode |
Darius Crenshaw, Byron Lovell Williams, Alwin Tsao, Hisashi Shichijo, Satyavolu S. Papa Rao +1 more |
2007-07-31 |
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Define via in dual damascene process |
Thomas Wolf, Allen Yen |
2007-01-09 |
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Dual damascene process with no passing metal features |
— |
2006-01-24 |
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Split barrier layer including nitrogen-containing portion and oxygen-containing portion |
Gerald W. Gibson, Scott Jessen, Kurt G. Steiner, Susan Clay Vitkavage |
2005-04-12 |
| 6555910 |
Use of small openings in large topography features to improve dielectric thickness control and a method of manufacture thereof |
Robert A. Ashton, Mary Roby, Morgan J. Thoma, Daniel J. Vitkavage |
2003-04-29 |
| 6362638 |
Stacked via Kelvin resistance test structure for measuring contact anomalies in multi-level metal integrated circuit technologies |
Robert A. Ashton, Mary Roby, Daniel J. Vitkavage |
2002-03-26 |
| 6329281 |
Methods for fabricating a multilevel interconnection for an integrated circuit device utilizing a selective overlayer |
Mary Roby, Daniel J. Vitkavage |
2001-12-11 |
| 6218085 |
Process for photoresist rework to avoid sodium incorporation |
Simon John Molloy, Nace Layadi, Allen Yen, Brian D. Crevasse |
2001-04-17 |
| 5891784 |
Transistor fabrication method |
Wan Yee Cheung, Sailesh Chittipeddi, Chong-Cheng Fu, Taeho Kook, Avinoam Kornblit +2 more |
1999-04-06 |
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Doping of silicon layers |
Yaw S. Obeng, Eric John Persson |
1998-01-27 |
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Buried antifuse |
— |
1992-03-31 |