Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7678639 | Inductor formed in an integrated circuit | Edward B. Harris, Sailesh Mansinh Merchant, Kurt G. Steiner | 2010-03-16 |
| 7541238 | Inductor formed in an integrated circuit | Edward B. Harris, Sailesh Mansinh Merchant, Kurt G. Steiner | 2009-06-02 |
| 7068139 | Inductor formed in an integrated circuit | Edward B. Harris, Sailesh Mansinh Merchant, Kurt G. Steiner | 2006-06-27 |
| 6879046 | Split barrier layer including nitrogen-containing portion and oxygen-containing portion | Gerald W. Gibson, Scott Jessen, Steven Alan Lytle, Kurt G. Steiner | 2005-04-12 |
| 6798043 | Structure and method for isolating porous low-k dielectric films | Kurt G. Steiner, Steve Lytle, Gerald W. Gibson, Scott Jessen | 2004-09-28 |
| 6657302 | Integration of low dielectric material in semiconductor circuit structures | Huili Shao, Allen Yen | 2003-12-02 |
| 6576980 | Surface treatment anneal of hydrogenated silicon-oxy-carbide dielectric layer | Huili Shao, Kurt G. Steiner | 2003-06-10 |
| 6548892 | Low k dielectric insulator and method of forming semiconductor circuit structures | Kurt G. Steiner | 2003-04-15 |
| 6432814 | Method of manufacturing an interconnect structure having a passivation layer for preventing subsequent processing reactions | Kurt G. Steiner | 2002-08-13 |
| 6258231 | Chemical mechanical polishing endpoint apparatus using component activity in effluent slurry | William Easter, Sudhanshu Misra, Pradip K. Roy | 2001-07-10 |
| 6214732 | Chemical mechanical polishing endpoint detection by monitoring component activity in effluent slurry | William Easter, Sudhanshu Misra, Pradip K. Roy | 2001-04-10 |
| 6083810 | Integrated circuit fabrication process | Yaw S. Obeng | 2000-07-04 |
| 6028359 | Integrated circuit having amorphous silicide layer in contacts and vias and method of manufacture therefor | Sailesh Mansinh Merchant, Daniel J. Vitkavage | 2000-02-22 |
| 5858873 | Integrated circuit having amorphous silicide layer in contacts and vias and method of manufacture thereof | Daniel J. Vitkavage, Sailesh Mansinh Merchant | 1999-01-12 |
| 5607543 | Integrated circuit etching | Juli H. Eisenberg | 1997-03-04 |
| 5244821 | Bipolar fabrication method | Thomas Edward Ham, John W. Osenbach, Morgan J. Thoma | 1993-09-14 |