PT

Phong T. Tran

IBM: 20 patents #5,451 of 70,183Top 8%
WT Western Digital Technologies: 1 patents #1,787 of 3,180Top 60%
Overall (All Time): #202,867 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12393543 System and method for utilizing a data storage device with power performance profiles and/or temperature monitoring Anthony Hubert Welsh, San A. Phong, Charles A. Neumann 2025-08-19
11940271 High power device fault localization via die surface contouring David J. Lewison, Jay A. Bunt, Frank L. Pompeo, Richard W. Oldrey, John D. Sylvestri 2024-03-26
10768230 Built-in device testing of integrated circuits Robert M. Casatuta, Mary P. Kusko, Gary W. Maier, Franco Motika 2020-09-08
10254336 Iterative N-detect based logic diagnostic technique Mary P. Kusko, Gary W. Maier, Franco Motika 2019-04-09
10169510 Dynamic fault model generation for diagnostics simulation and pattern generation Mary P. Kusko, Gary W. Maier, Franco Motika 2019-01-01
10024910 Iterative N-detect based logic diagnostic technique Mary P. Kusko, Gary W. Maier, Franco Motika 2018-07-17
9852245 Dynamic fault model generation for diagnostics simulation and pattern generation Mary P. Kusko, Gary W. Maier, Franco Motika 2017-12-26
9552449 Dynamic fault model generation for diagnostics simulation and pattern generation Mary P. Kusko, Gary W. Maier, Franco Motika 2017-01-24
8086924 Implementing diagnosis of transitional scan chain defects using logic built in self test LBIST test patterns Donato O. Forlenza, Orazio P. Forlenza 2011-12-27
8065575 Implementing isolation of VLSI scan chain using ABIST test patterns Donato O. Forlenza, Orazio P. Forlenza 2011-11-22
7934134 Method and apparatus for performing logic built-in self-testing of an integrated circuit Donato O. Forlenza, Orazio P. Forlenza, Bryan J. Robbins 2011-04-26
7930601 AC ABIST diagnostic method, apparatus and program product Joseph Eckelman, Donato O. Forlenza, Orazio P. Forlenza, William J. Hurley, Thomas J. Knips +1 more 2011-04-19
7921346 Verification of array built-in self-test (ABIST) design-for-test/design-for-diagnostics (DFT/DFD) Donato O. Forlenza, Orazio P. Forlenza, Bryan J. Robbins 2011-04-05
7908532 Automated system and processing for expedient diagnosis of broken shift registers latch chains Joseph Eckelman, Donato O. Forlenza, Orazio P. Forlenza, Robert B. Gass 2011-03-15
7908534 Diagnosable general purpose test registers scan chain design Franco Motika, Michael R. Ouellette 2011-03-15
7831863 Method for enhancing the diagnostic accuracy of a VLSI chip Mary P. Kusko, Gary W. Maier, Franco Motika 2010-11-09
7475308 implementing deterministic based broken scan chain diagnostics Adrian C. Anderson, Todd Burdine, Donato O. Forlenza, Orazio P. Forlenza, William J. Hurley 2009-01-06
7395470 Method, apparatus, and computer program product for diagnosing a scan chain failure employing fuses coupled to the scan chain Todd Burdine, Donato O. Forlenza, Orazio P. Forlenza, William J. Hurley 2008-07-01
7395469 Method for implementing deterministic based broken scan chain diagnostics Adrian C. Anderson, Todd Burdine, Donato O. Forlenza, Orazio P. Forlenza, William J. Hurley 2008-07-01
7392449 Method, apparatus, and computer program product for diagnosing a scan chain failure employing fuses coupled to the scan chain Todd Burdine, Donato O. Forlenza, Orazio P. Forlenza, William J. Hurley 2008-06-24
6961886 Diagnostic method for structural scan chain designs Franco Motika, Phillip J. Nigh 2005-11-01