Issued Patents All Time
Showing 25 most recent of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10629512 | Integrated circuit die with in-chip heat sink | Jonathan Chang, Nui Chong, Henley Liu, Gamal Refai-Ahmed, Suresh Ramalingam | 2020-04-21 |
| 10434323 | Devices and methods for magnetic stimulation for the treatment of neurological disorders | Zhaoyin D. Wu, Hsiu-Wen Huang | 2019-10-08 |
| 9814898 | Devices and methods for magnetic stimulation for the treatment of neurological disorders | Zhaoyin D. Wu, Hsiu-Wen Huang | 2017-11-14 |
| 9385127 | Method and apparatus for suppressing metal-gate cross-diffusion in semiconductor technology | Qi Lin, Yun Wu, Bang-Thu Nguyen | 2016-07-05 |
| 9205275 | Devices and methods for magnetic stimulation for the treatment of neurological disorders | Zhaoyin D. Wu, Hsiu-Wen Huang | 2015-12-08 |
| 8890164 | Apparatus and method for reducing plasma-induced damage in pMOSFETS | Qi Lin, Yun Wu, Bang-Thu Nguyen | 2014-11-18 |
| 8878337 | Integrated circuit structure having a capacitor structured to reduce dishing of metal layers | Yun Wu, Shuxian Wu, Qi Lin, Bang-Thu Nguyen | 2014-11-04 |
| 8350365 | Mitigation of well proximity effect in integrated circuits | Yun Wu, Qi Lin, Bang-Thu Nguyen | 2013-01-08 |
| 8296689 | Customizing metal pattern density in die-stacking applications | Arifur Rahman | 2012-10-23 |
| 8266553 | System and method for detecting mask data handling errors | Bang-Thu Nguyen, Yan Wang, Xin Wu | 2012-09-11 |
| 8194372 | Systems and methods for electrostatic discharge protection | Nui Chong | 2012-06-05 |
| 8068004 | Embedded inductor | Nui Chong | 2011-11-29 |
| 8063654 | Apparatus and method for testing of stacked die structure | Arifur Rahman, Bang-Thu Nguyen | 2011-11-22 |
| 7737020 | Method of fabricating CMOS devices using fluid-based dielectric materials | Jonathan Ho | 2010-06-15 |
| 7673270 | Method and apparatus for compensating an integrated circuit layout for mechanical stress effects | Yan Wang, Nui Chong, Bang-Thu Nguyen, Jonathan Ho, Qi Lin +4 more | 2010-03-02 |
| 6833318 | Gap-filling process | Chun-Jen Weng, Juan-Yi Chen, Cedric Lee, Der-Yuan Wu, Jackson Lin +3 more | 2004-12-21 |
| 6670249 | Process for forming high temperature stable self-aligned metal silicide layer | Tung-Po Chen | 2003-12-30 |
| 6277721 | Salicide formation process | Tung-Po Chen, Wen-Yi Hsieh | 2001-08-21 |
| 6258692 | Method forming shallow trench isolation | Chih-Hsun Chu, Ming-Tzong Yang | 2001-07-10 |
| 6156633 | Process for forming high temperature stable self-aligned metal silicide layer | Tung-Po Chen | 2000-12-05 |
| 6022795 | Salicide formation process | Tung-Po Chen, Wen-Yi Hsieh | 2000-02-08 |
| 6010958 | Method for improving the planarization of dielectric layer in the fabrication of metallic interconnects | Tung-Po Chen, Bing Wu | 2000-01-04 |
| 5970379 | Method of reducing loss of metal silicide in pre-metal etching | Tung-Po Chen | 1999-10-19 |
| 5902752 | Active layer mask with dummy pattern | Shin-Wei Sun, Water Lur, Ming-Tzong Yang | 1999-05-11 |
| 5895945 | Single polysilicon neuron MOSFET | Chung-Cheng Wu, Ming-Tzong Yang | 1999-04-20 |