Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11163568 | Implementing write ports in register-file array cell | Saiful Islam, Sam Gat-Shang Chu, Dung Q. Nguyen, Binglong Zhang, Howard Levy +1 more | 2021-11-02 |
| 11138050 | Operation of a multi-slice processor implementing a hardware level transfer of an execution thread | Brian D. Barrick, James Wilson Bishop, Marcy E. Byers, Sundeep Chadha, Cliff Kucharski +2 more | 2021-10-05 |
| 11093282 | Register file write using pointers | Brian D. Barrick, Steven J. Battle, Joshua W. Bowman, Cliff Kucharski, Hung Q. Le +1 more | 2021-08-17 |
| 10909034 | Issue queue snooping for asynchronous flush and restore of distributed history buffer | Dung Q. Nguyen, Brian W. Thompto, Joshua W. Bowman, Steven J. Battle, Sundeep Chadha +2 more | 2021-02-02 |
| 10671398 | Low-overhead, low-latency operand dependency tracking for instructions operating on register pairs in a processor core | Maarten J. Boersma, Sundeep Chadha, Kurt A. Feiste, Michael J. Genden, Michael K. Kroener | 2020-06-02 |
| 10671399 | Low-overhead, low-latency operand dependency tracking for instructions operating on register pairs in a processor core | Maarten J. Boersma, Sundeep Chadha, Kurt A. Feiste, Michael J. Genden, Michael K. Kroener | 2020-06-02 |
| 10564691 | Reducing power consumption in a multi-slice computer processor | Steven J. Battle, Owen Chiang, Sam Gat-Shang Chu, Saiful Islam, Dung Q. Nguyen +1 more | 2020-02-18 |
| 10545765 | Multi-level history buffer for transaction memory in a microprocessor | Brian D. Barrick, Steven J. Battle, Joshua W. Bowman, Hung Q. Le, Dung Q. Nguyen +1 more | 2020-01-28 |
| 10489253 | On-demand GPR ECC error detection and scrubbing for a multi-slice microprocessor | Steven J. Battle, Joshua W. Bowman, Sundeep Chadha, Dhivya Jeganathan, Cliff Kucharski +2 more | 2019-11-26 |
| 10379867 | Asynchronous flush and restore of distributed history buffer | Dung Q. Nguyen, Brian W. Thompto, Joshua W. Bowman, Steven J. Battle, Brian D. Barrick +2 more | 2019-08-13 |
| 10318356 | Operation of a multi-slice processor implementing a hardware level transfer of an execution thread | Brian D. Barrick, James Wilson Bishop, Marcy E. Byers, Sundeep Chadha, Cliff Kucharski +2 more | 2019-06-11 |
| 10296337 | Preventing premature reads from a general purpose register | Steven J. Battle, Owen Chiang, Sam Gat-Shang Chu, Saiful Islam, Dung Q. Nguyen +1 more | 2019-05-21 |
| 10289415 | Method and apparatus for execution of threads on processing slices using a history buffer for recording architected register data | Susan E. Eisen, Cliff Kucharski, Hung Q. Le, Dung Q. Nguyen | 2019-05-14 |
| 10282205 | Method and apparatus for execution of threads on processing slices using a history buffer for restoring architected register data via issued instructions | Susan E. Eisen, Cliff Kucharski, Hung Q. Le, Dung Q. Nguyen | 2019-05-07 |
| 10282207 | Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction | Brian D. Barrick, Sundeep Chadha, Michael J. Genden, Jerry Y. Lu, Dung Q. Nguyen +2 more | 2019-05-07 |
| 10268482 | Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction | Brian D. Barrick, Sundeep Chadha, Michael J. Genden, Jerry Y. Lu, Dung Q. Nguyen +2 more | 2019-04-23 |
| 10255071 | Method and apparatus for managing a speculative transaction in a processing unit | Salma Ayub, Susan E. Eisen, Glenn O. Kincaid, Cliff Kucharski, Christopher M. Mueller +1 more | 2019-04-09 |
| 10248421 | Operation of a multi-slice processor with reduced flush and restore latency | Salma Ayub, Brian D. Barrick, Joshua W. Bowman, Sundeep Chadha, Cliff Kucharski +2 more | 2019-04-02 |
| 10248426 | Direct register restore mechanism for distributed history buffers | Brian D. Barrick, Steven J. Battle, Joshua W. Bowman, Christopher M. Mueller, Dung Q. Nguyen +2 more | 2019-04-02 |
| 10241800 | Split-level history buffer in a computer processing unit | Hung Q. Le, Dung Q. Nguyen | 2019-03-26 |
| 10241790 | Operation of a multi-slice processor with reduced flush and restore latency | Salma Ayub, Brian D. Barrick, Joshua W. Bowman, Sundeep Chadha, Cliff Kucharski +2 more | 2019-03-26 |
| 10223196 | ECC scrubbing method in a multi-slice microprocessor | Brian D. Barrick, James Wilson Bishop, Maarten J. Boersma, Marcy E. Byers, Sundeep Chadha +2 more | 2019-03-05 |
| 10209757 | Reducing power consumption in a multi-slice computer processor | Steven J. Battle, Owen Chiang, Sam Gat-Shang Chu, Saiful Islam, Dung Q. Nguyen +1 more | 2019-02-19 |
| 10176038 | Partial ECC mechanism for a byte-write capable register | Dhivya Jeganathan, Dung Q. Nguyen, Jose Angel Paredes, Brian W. Thompto | 2019-01-08 |
| 10140127 | Operation of a multi-slice processor with selective producer instruction types | Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden +2 more | 2018-11-27 |