Issued Patents All Time
Showing 126–150 of 191 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7465976 | Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions | Jack T. Kavalieros, Matthew V. Metz, Gilbert Dewey, Ben Jin, Justin K. Brask +1 more | 2008-12-16 |
| 7456476 | Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication | Scott A. Hareland, Robert S. Chau, Brian S. Doyle, Rafael Rios, Tom Linton | 2008-11-25 |
| 7456068 | Forming ultra-shallow junctions | Jack T. Kavalieros, Mark Liu | 2008-11-25 |
| 7449756 | Semiconductor device with a high-k gate dielectric and a metal gate electrode | Matthew V. Metz, Mark L. Doczy, Justin K. Brask, Jack T. Kavalieros, Robert S. Chau | 2008-11-11 |
| 7449373 | Method of ion implanting for tri-gate devices | Brian S. Doyle, Jack T. Kavalieros, Amlan Majumdar | 2008-11-11 |
| 7445980 | Method and apparatus for improving stability of a 6T CMOS SRAM cell | Brian S. Doyle, Robert S. Chau, Jack T. Kavalieros, Bo Zheng, Scott A. Hareland | 2008-11-04 |
| 7442983 | Method for making a semiconductor device having a high-k gate dielectric | Mark L. Doczy, Gilbert Dewey, Sangwoo Pae, Justin K. Brask, Jack T. Kavalieros +4 more | 2008-10-28 |
| 7439113 | Forming dual metal complementary metal oxide semiconductor integrated circuits | Mark L. Doczy, Mitchell Taylor, Justin K. Brask, Jack T. Kavalieros, Matthew V. Metz +2 more | 2008-10-21 |
| 7429747 | Sb-based CMOS devices | Mantu K. Hudait, Jack T. Kavalieros, Mark L. Doczy, Robert S. Chau | 2008-09-30 |
| 7427541 | Carbon nanotube energy well (CNEW) field effect transistor | Marko Radosavljevic, Brian S. Doyle, Jack T. Kavalieros, Justin K. Brask, Amlan Majumdar +1 more | 2008-09-23 |
| 7427794 | Tri-gate devices and methods of fabrication | Robert S. Chau, Brian S. Doyle, Jack T. Kavalieros, Douglas Barlage, Scott A. Hareland | 2008-09-23 |
| 7425490 | Reducing reactions between polysilicon gate electrodes and high dielectric constant gate dielectrics | Jack T. Kavalieros, Justin K. Brask, Mark L. Doczy, Uday Shah, Matthew V. Metz +1 more | 2008-09-16 |
| 7425500 | Uniform silicide metal on epitaxially grown source and drain regions of three-dimensional transistors | Matthew V. Metz, Mark L. Doczy, Jack T. Kavalieros, Justin K. Brask, Robert S. Chau | 2008-09-16 |
| 7407847 | Stacked multi-gate transistor design and method of fabrication | Brian S. Doyle, Titash Rakshit, Robert S. Chau, Justin K. Brask, Uday Shah | 2008-08-05 |
| 7402875 | Lateral undercut of metal gate in SOI device | Justin K. Brask, Jack T. Kavalieros, Brian S. Doyle, Gilbert Dewey, Mark L. Doczy +1 more | 2008-07-22 |
| 7390947 | Forming field effect transistors from conductors | Amlan Majumdar, Justin K. Brask, Marko Radosavljevic, Brian S. Doyle, Mark L. Doczy +5 more | 2008-06-24 |
| 7390709 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Mark L. Doczy, Justin K. Brask, Jack T. Kavalieros, Uday Shah, Matthew V. Metz +2 more | 2008-06-24 |
| 7387927 | Reducing oxidation under a high K gate dielectric | Robert Turkot, Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz +2 more | 2008-06-17 |
| 7384880 | Method for making a semiconductor device having a high-k gate dielectric | Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Robert S. Chau | 2008-06-10 |
| 7381608 | Method for making a semiconductor device with a high-k gate dielectric and a metal gate electrode | Justin K. Brask, Sangwoo Pae, Jack T. Kavalieros, Matthew V. Metz, Mark L. Doczy +2 more | 2008-06-03 |
| 7358121 | Tri-gate devices and methods of fabrication | Robert S. Chau, Brian S. Doyle, Jack T. Kavalieros, Douglas Barlage | 2008-04-15 |
| 7355281 | Method for making semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Uday Shah, Chris Barns +3 more | 2008-04-08 |
| 7355254 | Pinning layer for low resistivity N-type source drain ohmic contacts | Jack T. Kavalieros, Robert S. Chau, Mark L. Doczy | 2008-04-08 |
| 7348284 | Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow | Brian S. Doyle, Been-Yih Jin, Nancy Zelick, Robert S. Chau | 2008-03-25 |
| 7342277 | Transistor for non volatile memory devices having a carbon nanotube channel and electrically floating quantum dots in its gate dielectric | Marko Radosavljevic, Amlan Majumdar, Justin K. Brask, Brian S. Doyle, Robert S. Chau | 2008-03-11 |