Issued Patents All Time
Showing 176–191 of 191 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7098507 | Floating-body dynamic random access memory and method of fabrication in tri-gate technology | Stephen H. Tang, Ali Keshavarzi, Dinesh Somasekhar, Fabrice Paillet, Muhammad M. Khellah +4 more | 2006-08-29 |
| 7087476 | Using different gate dielectrics with NMOS and PMOS transistors of a complementary metal oxide semiconductor integrated circuit | Matthew V. Metz, Jack T. Kavalieros, Mark L. Doczy, Justin K. Brask, Robert S. Chau | 2006-08-08 |
| 7084038 | Method for making a semiconductor device having a high-k gate dielectric | Mark L. Doczy, Gilbert Dewey, Sangwoo Pae, Justin K. Brask, Jack T. Kavalieros +4 more | 2006-08-01 |
| 7074680 | Method for making a semiconductor device having a high-k gate dielectric | Mark L. Doczy, Gilbert Dewey, Sangwoo Pae, Justin K. Brask, Jack T. Kavalieros +4 more | 2006-07-11 |
| 7064066 | Method for making a semiconductor device having a high-k gate dielectric and a titanium carbide gate electrode | Matthew V. Metz, Mark L. Doczy, Jack T. Kavalieros, Justin K. Brask, Robert S. Chau | 2006-06-20 |
| 7060568 | Using different gate dielectrics with NMOS and PMOS transistors of a complementary metal oxide semiconductor integrated circuit | Matthew V. Metz, Jack T. Kavalieros, Mark L. Doczy, Justin K. Brask, Robert S. Chau | 2006-06-13 |
| 7045428 | Method for making a semiconductor device with a high-k gate dielectric and a conductor that facilitates current flow across a P/N junction | Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Uday Shah +3 more | 2006-05-16 |
| 7005366 | Tri-gate devices and methods of fabrication | Robert S. Chau, Brian S. Doyle, Jack T. Kavalieros, Douglas Barlage, Scott A. Hareland | 2006-02-28 |
| 6974738 | Nonplanar device with stress incorporation layer and method of fabrication | Scott A. Hareland, Robert S. Chau, Brian S. Doyle | 2005-12-13 |
| 6970373 | Method and apparatus for improving stability of a 6T CMOS SRAM cell | Brian S. Doyle, Robert S. Chau, Jack T. Kavalieros, Bo Zheng, Scott A. Hareland | 2005-11-29 |
| 6914295 | Tri-gate devices and methods of fabrication | Robert S. Chau, Brian S. Doyle, Jack T. Kavalieros, Douglas Barlage, Scott A. Hareland | 2005-07-05 |
| 6909151 | Nonplanar device with stress incorporation layer and method of fabrication | Scott A. Hareland, Robert S. Chau, Brian S. Doyle, Been-Yih Jin | 2005-06-21 |
| 6887800 | Method for making a semiconductor device with a high-k gate dielectric and metal layers that meet at a P/N junction | Matthew V. Metz, Jack T. Kavalieros, Mark L. Doczy, Justin K. Brask, Uday Shah +1 more | 2005-05-03 |
| 6869889 | Etching metal carbide films | Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Uday Shah +2 more | 2005-03-22 |
| 6858478 | Tri-gate devices and methods of fabrication | Robert S. Chau, Brian S. Doyle, Jack T. Kavalieros, Douglas Barlage, Scott A. Hareland | 2005-02-22 |
| 6787440 | Method for making a semiconductor device having an ultra-thin high-k gate dielectric | Christopher Parker, Markus Kuhn, Ying Zhou, Scott A. Hareland, Nick Lindert +4 more | 2004-09-07 |