RB

Robert G. Blankenship

IN Intel: 120 patents #141 of 30,777Top 1%
📍 Tacoma, WA: #2 of 723 inventorsTop 1%
🗺 Washington: #173 of 76,902 inventorsTop 1%
Overall (All Time): #9,841 of 4,157,543Top 1%
120
Patents All Time

Issued Patents All Time

Showing 26–50 of 120 patents

Patent #TitleCo-InventorsDate
10552357 Multichip package link Zuoguo Wu, Mahesh Wagh, Debendra Das Sharma, Gerald Pasdast, Ananthan Ayyasamy +2 more 2020-02-04
10552253 Multichip package link error detection Venkatraman Iyer, Mahesh Wagh, Zuoguo Wu 2020-02-04
10547680 Systems, methods, and apparatuses for range protection Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Raj K. Ramanujan 2020-01-28
10503688 Multiple transaction data flow control unit for high-speed interconnect Robert J. Safranek, Debendra Das Sharma 2019-12-10
10430252 Synchronization logic for memory requests Samantika S. Sury, Simon C. Steely, Jr. 2019-10-01
10387339 High performance interconnect physical layer Venkatraman Iyer, Darren S. Jue, Jeff Willey 2019-08-20
10380046 High performance interconnect physical layer Venkatraman Iyer, Darren S. Jue, Fulvio Spagna, Ashish Gupta 2019-08-13
10380059 Control messaging in multislot link layer flit Jeff Willey, Jeffrey C. Swanson 2019-08-13
10365965 High performance interconnect link layer Jeff Willey, Jeffrey C. Swanson, Robert J. Safranek 2019-07-30
10360096 Error handling in transactional buffered memory Brian S. Morris, Bill Nale, Eric L. Hendrickson 2019-07-23
10360098 High performance interconnect link layer Jeff Willey, Jeffrey C. Swanson, Robert J. Safranek 2019-07-23
10320710 Reliable replication mechanisms based on active-passive HFI protocols built on top of non-reliable multicast fabric implementations Francesc Guim Bernat, Charles A. Giefer, Raj K. Ramanujan, Narayan Ranganathan 2019-06-11
10310978 Apparatus and method for multi-level cache request tracking Samantika S. Sury 2019-06-04
10268583 High performance interconnect coherence protocol resolving conflict based on home transaction identifier different from requester transaction identifier Robert Beers, Robert J. Safranek, Jeff Willey, Robert A. Maddox, Aaron T. Spink 2019-04-23
10248591 High performance interconnect Robert J. Safranek, Venkatraman Iyer, Jeff Willey, Robert Beers, Darren S. Jue +18 more 2019-04-02
10248325 Implied directory state updates 2019-04-02
10204064 Multislot link layer flit wherein flit includes three or more slots whereby each slot comprises respective control field and respective payload field Jeff Willey, Jeffrey C. Swanson, Robert J. Safranek 2019-02-12
10198379 Early identification in transactional buffered memory Brian S. Morris, Bill Nale, Jeffrey C. Swanson 2019-02-05
10146690 Synchronization logic for memory requests Samantika S. Sury, Simon C. Steely, Jr. 2018-12-04
10146733 High performance interconnect physical layer Venkatraman Iyer, Darren S. Jue, Fulvio Spagna, Debendra Das Sharma, Jeffrey C. Swanson 2018-12-04
10140240 Control messaging in multislot link layer flit Jeff Willey, Jeffrey C. Swanson 2018-11-27
10140213 Two level memory full line writes Jeffrey D. Chamberlain, Yen-Cheng Liu, Vedaraman Geetha 2018-11-27
10095622 System, method, and apparatuses for remote monitoring Francesc Guim Bernat, Karthik Kumar, Raj K. Ramanujan, Thomas Willhalm, Narayan Ranganathan 2018-10-09
10078617 Multiple transaction data flow control unit for high-speed interconnect Robert J. Safranek, Debendra Das Sharma 2018-09-18
10073808 Multichip package link Zuoguo Wu, Mahesh Wagh, Debendra Das Sharma, Gerald Pasdast, Ananthan Ayyasamy +2 more 2018-09-11