JS

Jeffrey C. Swanson

IN Intel: 24 patents #1,642 of 30,777Top 6%
Overall (All Time): #166,206 of 4,157,543Top 4%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12197357 High performance interconnect Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more 2025-01-14
12189550 High performance interconnect Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more 2025-01-07
11741030 High performance interconnect Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more 2023-08-29
11269793 High performance interconnect Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more 2022-03-08
10380059 Control messaging in multislot link layer flit Jeff Willey, Robert G. Blankenship 2019-08-13
10365965 High performance interconnect link layer Jeff Willey, Robert G. Blankenship, Robert J. Safranek 2019-07-30
10360098 High performance interconnect link layer Jeff Willey, Robert G. Blankenship, Robert J. Safranek 2019-07-23
10248591 High performance interconnect Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more 2019-04-02
10204064 Multislot link layer flit wherein flit includes three or more slots whereby each slot comprises respective control field and respective payload field Jeff Willey, Robert G. Blankenship, Robert J. Safranek 2019-02-12
10198379 Early identification in transactional buffered memory Brian S. Morris, Bill Nale, Robert G. Blankenship 2019-02-05
10146733 High performance interconnect physical layer Venkatraman Iyer, Darren S. Jue, Robert G. Blankenship, Fulvio Spagna, Debendra Das Sharma 2018-12-04
10140240 Control messaging in multislot link layer flit Jeff Willey, Robert G. Blankenship 2018-11-27
10061719 Packed write completions Brian S. Morris, Bill Nale, Robert G. Blankenship, Jeff Willey, Eric L. Hendrickson 2018-08-28
9753885 Multislot link layer flit wherein flit includes three or more slots whereby each slot comprises respective control field and respective payload field Jeff Willey, Robert G. Blankenship, Robert J. Safranek 2017-09-05
9740654 Control messaging in multislot link layer flit Jeff Willey, Robert G. Blankenship 2017-08-22
9740646 Early identification in transactional buffered memory Brian S. Morris, Bill Nale, Robert G. Blankenship 2017-08-22
9626321 High performance interconnect Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more 2017-04-18
9537665 Method, apparatus, and system for enabling platform power states Selim Bilgin, Lily P. Looi 2017-01-03
9507746 Control messaging in multislot link layer flit Jeff Willey, Robert G. Blankenship 2016-11-29
9479196 High performance interconnect link layer Jeff Willey, Robert G. Blankenship, Robert J. Safranek 2016-10-25
9444492 High performance interconnect link layer Jeff Willey, Robert G. Blankenship, Robert J. Safranek 2016-09-13
9355058 High performance interconnect physical layer Venkatraman Iyer, Darren S. Jue, Robert G. Blankenship, Fulvio Spagna, Debendra Das Sharma 2016-05-31
9208121 High performance interconnect physical layer Venkatraman Iyer, Darren S. Jue, Robert G. Blankenship, Fulvio Spagna, Debendra Das Sharma 2015-12-08
8539260 Method, apparatus, and system for enabling platform power states Selim Bilgin, Lily P. Looi 2013-09-17