Issued Patents All Time
Showing 51–62 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11251117 | Self aligned gratings for tight pitch interconnects and methods of fabrication | Manish Chandhok, Paul A. Nyhus, Gobind Bisht, Jonathan Laib, David Shykind +5 more | 2022-02-15 |
| 11233152 | Self-aligned gate endcap (SAGE) architectures with gate-all-around devices | Biswajeet Guha, William Hsu, Dax M. Crum, Tahir Ghani | 2022-01-25 |
| 11227863 | Gate isolation in non-planar transistors | Gopinath Bhimarasetti, Vyom Sharma, Walid M. Hafez, Christopher P. Auth | 2022-01-18 |
| 11189614 | Process etch with reduced loading effect | Elliot N. Tan | 2021-11-30 |
| 11164790 | Integrated nanowire and nanoribbon patterning in transistor manufacture | Biswajeet Guha, Mark Armstrong, Tahir Ghani, William Hsu | 2021-11-02 |
| 11056397 | Directional spacer removal for integrated circuit structures | Elliot N. Tan | 2021-07-06 |
| 11043492 | Self-aligned gate edge trigate and finFET devices | Szuya S. Liao, Biswajeet Guha, Tahir Ghani, Christopher KENYON | 2021-06-22 |
| 10797047 | Gate isolation in non-planar transistors | Gopinath Bhimarasetti, Vyom Sharma, Walid M. Hafez, Christopher P. Auth | 2020-10-06 |
| 10559529 | Pitch division patterning approaches with increased overlay margin for back end of line (BEOL) interconnect fabrication and structures resulting therefrom | Charles H. Wallace, Manish Chandhok, Paul A. Nyhus | 2020-02-11 |
| 10541143 | Self-aligned build-up of topographic features | Nick Lindert | 2020-01-21 |
| 10522402 | Grid self-aligned metal via processing schemes for back end of line (BEOL) interconnects and structures resulting therefrom | — | 2019-12-31 |
| 9916988 | Sacrificial material for stripping masking layers | Shakuntala Sundararajan, Nadia M. Rahhal-Orabi, Michael K. Harper, Ralph T. Troeger | 2018-03-13 |