Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9396020 | Context switching mechanism for a processing core having a general purpose CPU core and a tightly coupled accelerator | Boris Ginzburg, Ronny Ronen, Eliezer Weissmann, Karthikeyan Vaithianathan | 2016-07-19 |
| 9092597 | Storage device and method for using a virtual file in a public memory area to access a plurality of protected files in a private memory area | Eyal Ittah, Lola Grin, Uri Peltz, Irit Maor, Yonatan Halevi +1 more | 2015-07-28 |
| 8996851 | Host device and method for securely booting the host device with operating system code loaded from a storage device | Boris Dolgunov, Reuven Elhamias | 2015-03-31 |
| 8806101 | Metaphysical address space for holding lossy metadata in hardware | Gad Sheaffer, Shlomo Raikin, Vadim Bassin, Raanan Sade, Oleg Margulis | 2014-08-12 |
| 8799582 | Extending cache coherency protocols to support locally buffered data | Gad Sheaffer, Shlomo Raikin, Vadim Bassin, Raanan Sade, Oleg Margulis | 2014-08-05 |
| 8769212 | Memory model for hardware attributes within a transactional memory system | Gad Sheaffer, Shlomo Raikin, Vadim Bassin, Oleg Margulis | 2014-07-01 |
| 8688917 | Read and write monitoring attributes in transactional memory (TM) systems | Gad Sheaffer, Shlomo Raikin, Vadim Bassin, Raanan Sade, Oleg Margulis | 2014-04-01 |
| 8627014 | Memory model for hardware attributes within a transactional memory system | Gad Sheaffer, Shlomo Raikin, Vadim Bassin, Oleg Margulis | 2014-01-07 |
| 8627017 | Read and write monitoring attributes in transactional memory (TM) systems | Gad Sheaffer, Shlomo Raikin, Vadim Bassin, Raanan Sade, Oleg Margulis | 2014-01-07 |
| 8595426 | Handling commands within a write-once read-many storage device configuration | Eyal Ittah, Lola Grin, Uri Peltz, Yossi Bener, Boaz Greenberg +1 more | 2013-11-26 |
| 8352683 | Method and system to reduce the power consumption of a memory device | Oleg Margulis, Raanan Sade, Stanislav Shwartsman | 2013-01-08 |
| 8347035 | Posting weakly ordered transactions | Geeyarpuram N. Santhanakrishnan, Julius Mandelblat, Larisa Novakovsky, Zeev Offen, Michelle J. Moravan +2 more | 2013-01-01 |
| 8271732 | System and method to reduce power consumption by partially disabling cache memory | Oleg Margulis, Raanan Sade, Stanislav Shwartsman | 2012-09-18 |
| 7882325 | Method and apparatus for a double width load using a single width load port | Zeev Sperber, Robert Valentine, Doron Orenstien, Benny Eitan | 2011-02-01 |
| 6944720 | Memory system for multiple data types | Zeev Sperber, Guy Peled, Doron Orenstein, Gabi Malka | 2005-09-13 |
| 6633951 | Method for reducing power consumption through dynamic memory storage inversion | — | 2003-10-14 |
| 6580427 | Z-compression mechanism | Doron Orenstein, Guy Peled, Zeev Sperber, Gabi Malka | 2003-06-17 |
| 6557083 | Memory system for multiple data types | Zeev Sperber, Guy Peled, Doron Orenstein, Gabi Malka | 2003-04-29 |