Issued Patents All Time
Showing 51–70 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6518155 | Device structure and method for reducing silicide encroachment | Robert S. Chau, Mitch Taylor, Chia-Hong Jan, Julie Tsai | 2003-02-11 |
| 6506692 | Method of making a semiconductor device using a silicon carbide hard mask | — | 2003-01-14 |
| 6482754 | Method of forming a carbon doped oxide layer on a substrate | Kevin Peterson | 2002-11-19 |
| 6448185 | Method for making a semiconductor device that has a dual damascene interconnect | Alan M. Myers | 2002-09-10 |
| 6437444 | Interlayer dielectric with a composite dielectric stack | — | 2002-08-20 |
| 6417098 | Enhanced surface modification of low K carbon-doped oxide | Lawrence Wong, Donald Danielson, Sarah Bowen | 2002-07-09 |
| 6392271 | Structure and process flow for fabrication of dual gate floating body integrated MOS transistors | Mohsen Alavi, Scott Thompson, Mark Bohr | 2002-05-21 |
| 6380010 | Shielded channel transistor structure with embedded source/drain junctions | Lawrence N. Brigham, Richard Green | 2002-04-30 |
| 6362091 | Method for making a semiconductor device having a low-k dielectric layer | Qing Ma, Quan Tran, Steve Towle | 2002-03-26 |
| 6350670 | Method for making a semiconductor device having a carbon doped oxide insulating layer | Sam Sivakumar, Larry Wong | 2002-02-26 |
| 6316063 | Method for preparing carbon doped oxide insulating layers | Larry Wong | 2001-11-13 |
| 6274913 | Shielded channel transistor structure with embedded source/drain junctions | Lawrence N. Brigham, Richard Green | 2001-08-14 |
| 6235568 | Semiconductor device having deposited silicon regions and a method of fabrication | Anand S. Murthy, Chia-Hong Jan, Kevin R. Weldon | 2001-05-22 |
| 6191050 | Interlayer dielectric with a composite dielectric stack | — | 2001-02-20 |
| 6121100 | Method of fabricating a MOS transistor with a raised source/drain extension | Lawrence N. Brigham, Robert S. Chau, Tahir Ghani, Chia-Hong Jan, Justin S. Sandford +1 more | 2000-09-19 |
| 6093651 | Polish pad with non-uniform groove depth to improve wafer polish rate uniformity | Matthew J. Prince | 2000-07-25 |
| 5953635 | Interlayer dielectric with a composite dielectric stack | — | 1999-09-14 |
| 5877072 | Process for forming doped regions from solid phase diffusion source | Scott Thompson | 1999-03-02 |
| 5672095 | Elimination of pad conditioning in a chemical mechanical polishing process | Seiichi Morimoto | 1997-09-30 |
| 5270264 | Process for filling submicron spaces with dielectric | Robert J. Patterson | 1993-12-14 |