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USPTO Patent Rankings Data through Dec 31, 2025
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Sam Sivakumar — 14 Patents

Intel: 14 patents #2,935 of 30,777Top 10%
Hillsboro, OR: #319 of 2,365 inventorsTop 15%
Oregon: #3,136 of 28,073 inventorsTop 15%
Overall (All Time): #332,869 of 4,157,543Top 9%
14 Patents All Time
Sam Sivakumar has been granted 14 US patents while listed as an inventor at Intel. The first was granted in 2000 and the most recent in January 2023. Sam Sivakumar ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Sam Sivakumar in Hillsboro, OR, US.

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11569231 Non-planar transistors with channel regions having varying widths Stephen D. Snyder, Leonard P. GULER, Richard E. Schenker, Michael K. Harper, Urusa Alaan +2 more 2023-01-31 $11,941,000
7648803 Diagonal corner-to-corner sub-resolution assist features for photolithography Charles H. Wallace, Shannon Daviess 2010-01-19 $22,167,000
7374865 Methods to pattern contacts using chromeless phase shift masks Paul A. Nyhus 2008-05-20 $25,766,000
7179570 Chromeless phase shift lithography (CPL) masks having features to pattern large area line/space geometries Paul A. Nyhus 2007-02-20 $9,940,000
7056645 Use of chromeless phase shift features to pattern large area line/space geometries Paul A. Nyhus 2006-06-06 $10,284,000
6774037 Method integrating polymeric interlayer dielectric in integrated circuits Makarem A. Hussein, Ruth A. Brain, Robert Turklot 2004-08-10 $15,945,000
6649515 Photoimageable material patterning techniques useful in fabricating conductive lines in circuit structures Peter K. Moon, Makarem A. Hussein, Alan M. Myers, Charles Recchia, Angelo Kandas 2003-11-18 $37,831,000
6406995 Pattern-sensitive deposition for damascene processing Makarem A. Hussein, Alan M. Myers, Charles Recchia, Angelo Kandas 2002-06-18 $57,699,000
6384481 Single step electroplating process for interconnect via fill and metal line patterning Makarem A. Hussein, Kevin J. Lee 2002-05-07 $68,605,000
6365529 Method for patterning dual damascene interconnects using a sacrificial light absorbing material Makarem A. Hussein 2002-04-02 $46,572,000
6350670 Method for making a semiconductor device having a carbon doped oxide insulating layer Ebrahim Andideh, Larry Wong 2002-02-26 $96,208,000
6329118 Method for patterning dual damascene interconnects using a sacrificial light absorbing material Makarem A. Hussein 2001-12-11 $125,527,000
6037255 Method for making integrated circuit having polymer interlayer dielectric Makarem A. Hussein, Rick Davis 2000-03-14 $200,527,000
6020266 Single step electroplating process for interconnect via fill and metal line patterning Makarem A. Hussein, Kevin J. Lee 2000-02-01 $155,838,000