BB

Boyan Boyanov

IN Intel: 46 patents #716 of 30,777Top 3%
IL Illumina: 28 patents #24 of 799Top 4%
IL Illumina Cambridge Limited: 3 patents #81 of 233Top 35%
University of California: 1 patents #8,022 of 18,278Top 45%
📍 San Diego, CA: #367 of 23,606 inventorsTop 2%
🗺 California: #3,647 of 386,348 inventorsTop 1%
Overall (All Time): #24,162 of 4,157,543Top 1%
77
Patents All Time

Issued Patents All Time

Showing 51–75 of 77 patents

Patent #TitleCo-InventorsDate
7968957 Transistor gate electrode having conductor material layer Anand S. Murthy, Suman Datta, Brian S. Doyle, Been-Yih Jin, Shaofeng Yu +1 more 2011-06-28
7923760 Dielectric spacers for metal interconnects and method to form the same Makarem A. Hussein 2011-04-12
7871916 Transistor gate electrode having conductor material layer Anand S. Murthy, Suman Datta, Brian S. Doyle, Been-Yih Jin, Shaofeng Yu +1 more 2011-01-18
7772702 Dielectric spacers for metal interconnects and method to form the same Jeffery D. Bielefeld 2010-08-10
7772706 Air-gap ILD with unlanded vias Sridhar Balakrishnan 2010-08-10
7662689 Strained transistor integration for CMOS Anand S. Murthy, Brian S. Doyle, Robert S. Chau 2010-02-16
7649239 Dielectric spacers for metal interconnects and method to form the same Makarem A. Hussein 2010-01-19
7642610 Transistor gate electrode having conductor material layer Anand S. Murthy, Suman Datta, Brian S. Doyle, Been-Yih Jin, Shaofeng Yu +1 more 2010-01-05
7544896 Forming a porous dielectric layer and structures formed thereby Grant Kloster, Vijay Ramachandrarao, Hyun-Mog Park 2009-06-09
7427775 Fabricating strained channel epitaxial source/drain transistors Anand S. Murthy, Justin K. Brask, Andrew N. Westmeyer, Nick Lindert 2008-09-23
7365375 Organic-framework zeolite interlayer dielectrics Michael Goodner, Mansour Moinpour, Grant Kloster 2008-04-29
7335586 Sealing porous dielectric material using plasma-induced surface polymerization Vijayakumar Ramachandrarao, Grant Kloster, Hyun-Mog Park 2008-02-26
7303989 Using zeolites to improve the mechanical strength of low-k interlayer dielectrics Grant Kloster, Michael Goodner 2007-12-04
7274055 Method for improving transistor performance through reducing the salicide interface resistance Anand S. Murthy, Glenn A. Glass, Thomas Hoffmann 2007-09-25
7235809 Semiconductor channel on insulator structure Been-Yih Jin, Brian S. Doyle, Scott A. Hareland, Mark L. Doczy, Matthew V. Metz +3 more 2007-06-26
7226842 Fabricating strained channel epitaxial source/drain transistors Anand S. Murthy, Justin K. Brask, Andrew N. Westmeyer, Nick Lindert 2007-06-05
7223679 Transistor gate electrode having conductor material layer Anand S. Murthy, Suman Datta, Brian S. Doyle, Been-Yih Jin, Shaofeng Yu +1 more 2007-05-29
7220668 Method of patterning a porous dielectric material Hyun-Mog Park, Grant Kloster, Vijayakumar Ramachandrarao 2007-05-22
7179755 Forming a porous dielectric layer and structures formed thereby Grant Kloster, Vijay Ramachandrarao, Hyun-Mog Park 2007-02-20
7138316 Semiconductor channel on insulator structure Been-Yih Jin, Brian S. Doyle, Scott A. Hareland, Mark L. Doczy, Matthew V. Metz +3 more 2006-11-21
6974733 Double-gate transistor with enhanced carrier mobility Brian S. Doyle, Jack T. Kavalieros, Anand S. Murthy, Robert S. Chau 2005-12-13
6949482 Method for improving transistor performance through reducing the salicide interface resistance Anand S. Murthy, Glenn A. Glass, Thomas Hoffmann 2005-09-27
6933589 Method of making a semiconductor transistor Anand S. Murthy, Ravindra Soman, Robert S. Chau 2005-08-23
6812086 Method of making a semiconductor transistor Anand S. Murthy, Ravindra Soman, Robert S. Chau 2004-11-02
6746967 Etching metal using sonication Justin K. Brask 2004-06-08