Issued Patents All Time
Showing 76–100 of 195 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10319646 | CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture | Marko Radosavljevic, Ravi Pillarisetty, Gilbert Dewey, Niloy Mukherjee, Jack T. Kavalieros +4 more | 2019-06-11 |
| 10263074 | High voltage field effect transistors | Han Wui Then, Robert S. Chau, Gilbert Dewey, Jack T. Kavalieros, Matthew V. Metz +3 more | 2019-04-16 |
| 10249742 | Offstate parasitic leakage reduction for tunneling field effect transistors | Van H. Le, Gilbert Dewey, Ashish Agrawal, Matthew V. Metz, Willy Rachmady +8 more | 2019-04-02 |
| 10249490 | Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy | Niti Goel, Robert S. Chau, Jack T. Kavalieros, Matthew V. Metz, Niloy Mukherjee +7 more | 2019-04-02 |
| 10236369 | Techniques for forming non-planar germanium quantum well devices | Ravi Pillarisetty, Jack T. Kavalieros, Willy Rachmady, Uday Shah, Marko Radosavljevic +4 more | 2019-03-19 |
| 10229991 | III-N epitaxial device structures on free standing silicon mesas | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Marko Radosavljevic, Seung Hoon Sung +1 more | 2019-03-12 |
| 10224399 | Strain compensation in transistors | Van H. Le, Harold Hal W. Kennel, Willy Rachmady, Ravi Pillarisetty, Jack T. Kavalieros | 2019-03-05 |
| 10204989 | Method of fabricating semiconductor structures on dissimilar substrates | Sherry R. Taft, Van H. Le, Sansaptak Dasgupta, Seung Hoon Sung, Sanaz K. Gardner +3 more | 2019-02-12 |
| 10186581 | Group III-N nanowire transistors | Han Wui Then, Robert S. Chau, Gilbert Dewey, Jack T. Kavalieros, Matthew V. Metz +3 more | 2019-01-22 |
| 10181518 | Selective epitaxially grown III-V materials based devices | Niti Goel, Gilbert Dewey, Niloy Mukherjee, Matthew V. Metz, Marko Radosavljevic +2 more | 2019-01-15 |
| 10177249 | Techniques for forming contacts to quantum well transistors | Ravi Pillarisetty, Mantu K. Hudait, Marko Radosavljevic, Jack T. Kavalieros, Willy Rachmady +2 more | 2019-01-08 |
| 10096709 | Aspect ratio trapping (ART) for fabricating vertical semiconductor devices | Van H. Le, Gilbert Dewey, Jack T. Kavalieros, Ravi Pillarisetty, Willy Rachmady +4 more | 2018-10-09 |
| 10096474 | Methods and structures to prevent sidewall defects during selective epitaxy | Niloy Mukherjee, Niti Goel, Sanaz K. Gardner, Pragyansri Pathi, Matthew V. Metz +6 more | 2018-10-09 |
| 10096682 | III-N devices in Si trenches | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Marko Radosavljevic +3 more | 2018-10-09 |
| 10096683 | Group III-N transistor on nanoscale template structures | Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung +1 more | 2018-10-09 |
| 10074718 | Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack | Gilbert Dewey, Marko Radosavljevic, Ravi Pillarisetty, Niloy Mukherjee | 2018-09-11 |
| 10032911 | Wide band gap transistor on non-native semiconductor substrate | Han Wui Then, Robert S. Chau, Sansaptak Dasgupta, Marko Radosavljevic, Seung Hoon Sung +2 more | 2018-07-24 |
| 10026845 | Deep gate-all-around semiconductor device having germanium or group III-V active layer | Ravi Pillarisetty, Willy Rachmady, Van H. Le, Seung Hoon Sung, Jessica S. Kachian +5 more | 2018-07-17 |
| 10020371 | Contact techniques and configurations for reducing parasitic resistance in nanowire transistors | Ravi Pillarisetty, Willy Rachmady, Van H. Le, Gilbert Dewey, Niloy Mukherjee +3 more | 2018-07-10 |
| 9972686 | Germanium tin channel transistors | Ravi Pillarisetty, Van H. Le, Willy Rachmady, Roza Kotlyar, Marko Radosavljevic +4 more | 2018-05-15 |
| 9947780 | High electron mobility transistor (HEMT) and method of fabrication | Han Wui Then, Robert S. Chau, Gilbert Dewey, Jack T. Kavalieros, Matthew V. Metz +3 more | 2018-04-17 |
| 9911835 | Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs | Roza Kotlyar, Stephen M. Cea, Gilbert Dewey, Uygar E. Avci, Rafael Rios +4 more | 2018-03-06 |
| 9911807 | Strain compensation in transistors | Van H. Le, Harold Hal W. Kennel, Willy Rachmady, Ravi Pillarisetty, Jack T. Kavalieros | 2018-03-06 |
| 9905651 | GE and III-V channel semiconductor devices having maximized compliance and free surface relaxation | Ravi Pillarisetty, Sansaptak Dasgupta, Niti Goel, Van H. Le, Marko Radosavljevic +8 more | 2018-02-27 |
| 9876014 | Germanium-based quantum well devices | Ravi Pillarisetty, Been-Yih Jin, Matthew V. Metz, Jack T. Kavalieros, Marko Radosavljevic +5 more | 2018-01-23 |