Issued Patents All Time
Showing 26–50 of 120 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8275976 | Hierarchical instruction scheduler facilitating instruction replay | — | 2012-09-25 |
| 8266412 | Hierarchical store buffer having segmented partitions | — | 2012-09-11 |
| 8055805 | Opportunistic improvement of MMIO request handling based on target reporting of space requirements | David J. Harriman | 2011-11-08 |
| 8037288 | Hybrid branch predictor having negative ovedrride signals | — | 2011-10-11 |
| 8028152 | Hierarchical multi-threading processor for executing virtual threads in a time-multiplexed fashion | — | 2011-09-27 |
| 7996656 | Attaching and virtualizing reconfigurable logic units to a processor | — | 2011-08-09 |
| 7644258 | Hybrid branch predictor using component predictors each having confidence and override signals | — | 2010-01-05 |
| 7318141 | Methods and systems to control virtual machines | Steve Bennett, Gilbert Neiger, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi +5 more | 2008-01-08 |
| 7308576 | Authenticated code module | James A. Sutton, Lawrence O. Smith, David W. Grawrock, Gilbert Neiger, Michael Kozuch | 2007-12-11 |
| 7149882 | Processor with instructions that operate on different data types stored in the same single logical register file | Larry M. Mennemeier, Alexander Peleg, David Bistry, Millind Mittal, Carole Dulong +4 more | 2006-12-12 |
| 6792523 | Processor with instructions that operate on different data types stored in the same single logical register file | Larry M. Menneneier, Alexander Peleg, David Bistry, Millind Mittal, Carole Dulong +4 more | 2004-09-14 |
| 6678816 | Method for optimized representation of page table entries | Ronny Ronen, Maury J. Bach, Robert Valentine, Richard Uhlig, Opher Kahn | 2004-01-13 |
| 6647482 | Method for optimized representation of page table entries | Ronny Ronen, Maury J. Bach, Robert Valentine, Richard Uhlig, Opher Kahn | 2003-11-11 |
| 6378062 | Method and apparatus for performing a store operation | Jeffery M. Abramson, Haitham Akkary, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland | 2002-04-23 |
| 6297843 | System providing video compression/encoding for communications across a network | — | 2001-10-02 |
| 6170997 | Method for executing instructions that operate on different data types stored in the same single logical register file | Larry M. Mennemeier, Alexander Peleg, David Bistry, Millind Mittal, Carole Dulong +4 more | 2001-01-09 |
| 6079014 | Processor that redirects an instruction fetch pipeline immediately upon detection of a mispredicted branch while committing prior instructions to an architectural state | David B. Papworth, Michael A. Fetterman, Robert P. Colwell, Glenn J. Hinton | 2000-06-20 |
| 6047369 | Flag renaming and flag masks within register alias table | Robert P. Colwell, Atiq Bajwa, Glenn J. Hinton, Michael A. Fetterman | 2000-04-04 |
| 6035393 | Stalling predicted prefetch to memory location identified as uncacheable using dummy stall instruction until branch speculation resolution | Ashwani K. Gupta | 2000-03-07 |
| 5987600 | Exception handling in a processor that performs speculative out-of-order instruction execution | David B. Papworth, Glenn J. Hinton, Michael A. Fetterman, Robert P. Colwell | 1999-11-16 |
| 5978737 | Method and apparatus for hazard detection and distraction avoidance for a vehicle | Stephen S. Pawlowski, George R. Hayek, Harshvardhan Sharangpani, Richard Calderwood | 1999-11-02 |
| 5974523 | Mechanism for efficiently overlapping multiple operand types in a microprocessor | Darrell D. Boggs, Michael A. Fetterman, Glenn J. Hinton, Robert P. Colwell, David B. Papworth | 1999-10-26 |
| 5956753 | Method and apparatus for handling speculative memory access operations | Haitham Akkary | 1999-09-21 |
| 5951670 | Segment register renaming in an out of order processor | Michael A. Fetterman | 1999-09-14 |
| 5948097 | Method and apparatus for changing privilege levels in a computer system without use of a call gate | Scott Dion Rodgers | 1999-09-07 |