LM

Larry M. Mennemeier

IN Intel: 82 patents #289 of 30,777Top 1%
Overall (All Time): #21,766 of 4,157,543Top 1%
82
Patents All Time

Issued Patents All Time

Showing 25 most recent of 82 patents

Patent #TitleCo-InventorsDate
9389858 Orderly storing of corresponding packed bytes from first and second source registers in result register Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2016-07-12
9361100 Packing saturated lower 8-bit elements from two source registers of packed 16-bit elements Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2016-06-07
9223572 Interleaving half of packed data elements of size specified in instruction and stored in two source registers Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2015-12-29
9182983 Executing unpack instruction and pack instruction with saturation on packed data elements from two source operand registers Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2015-11-10
9141387 Processor executing unpack and pack instructions specifying two source packed data operands and saturation Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2015-09-22
9116687 Packing in destination register half of each element with saturation from two source packed data registers Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2015-08-25
9015453 Packing odd bytes from two source registers of packed data Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2015-04-21
8838946 Packing lower half bits of signed data elements in two source registers in a destination register with saturation Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2014-09-16
8793299 Processor for performing multiply-add operations on packed data Alexander Peleg, Millind Mittal, Benny Eitan, Carole Dulong, Eiichi Kowashi +1 more 2014-07-29
8793475 Method and apparatus for unpacking and moving packed data Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2014-07-29
8745119 Processor for performing multiply-add operations on packed data Alexander Peleg, Millind Mittal, Benny Eitan, Carole Dulong, Eiichi Kowashi +1 more 2014-06-03
8725787 Processor for performing multiply-add operations on packed data Alexander Peleg, Millind Mittal, Benny Eitan, Carole Dulong, Eiichi Kowashi +1 more 2014-05-13
8639914 Packing signed word elements from two source registers to saturated signed byte elements in destination register Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2014-01-28
8626814 Method and apparatus for performing multiply-add operations on packed data Alexander Peleg, Milland Mittal, Benny Eitan, Carole Dulong, Eiichi Kowashi +1 more 2014-01-07
8601246 Execution of instruction with element size control bit to interleavingly store half packed data elements of source registers in same size destination register Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2013-12-03
8521994 Interleaving corresponding data elements from part of two source registers to destination register in processor operable to perform saturation Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2013-08-27
8495123 Processor for performing multiply-add operations on packed data Alexander Peleg, Millind Mittal, Benny Eitan, Carole Dulong, Eiichi Kowashi +1 more 2013-07-23
8495346 Processor executing pack and unpack instructions Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2013-07-23
8396915 Processor for performing multiply-add operations on packed data Alexander Peleg, Millind Mittal, Benny Eitan, Carole Dulong, Eiichi Kowashi +1 more 2013-03-12
8190867 Packing two packed signed data in registers with saturation Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2012-05-29
8185571 Processor for performing multiply-add operations on packed data Alexander Peleg, Millind Mittal, Benny Eitan, Carole Dulong, Eiichi Kowashi +1 more 2012-05-22
7966482 Interleaving saturated lower half of data elements from two source registers of packed data Alexander Peleg, Yaakov Yaari, Millind Mittal, Benny Eitan 2011-06-21
7509367 Method and apparatus for performing multiply-add operations on packed data Alexander Peleg, Millind Mittal, Benny Eitan, Carole Dulong, Eiichi Kowashi +1 more 2009-03-24
7480686 Method and apparatus for executing packed shift operations Derrick C. Lin, Punit Minocha, Alexander Peleg, Yaakov Yaari, Millind Mittal +2 more 2009-01-20
7461109 Method and apparatus for providing packed shift operations in a processor Derrick C. Lin, Punit Minocha, Alexander Peleg, Yaakov Yaari, Millind Mittal +1 more 2008-12-02