HT

Helmut Tews

Infineon Technologies Ag: 71 patents #37 of 7,486Top 1%
IBM: 22 patents #4,909 of 70,183Top 7%
SA Siemens Aktiengesellschaft: 10 patents #1,051 of 22,248Top 5%
OG Osram Opto Semiconductors Gmbh: 1 patents #707 of 1,154Top 65%
QA Qimonda Ag: 1 patents #252 of 575Top 45%
📍 Poughkeepsie, NY: #31 of 1,613 inventorsTop 2%
🗺 New York: #680 of 115,490 inventorsTop 1%
Overall (All Time): #17,656 of 4,157,543Top 1%
91
Patents All Time

Issued Patents All Time

Showing 26–50 of 91 patents

Patent #TitleCo-InventorsDate
7745875 Method for producing a vertical field effect transistor 2010-06-29
7635908 Corresponding capacitor arrangement and method for making the same Hans-Joachim Barth 2009-12-22
7528453 Field effect transistor with local source/drain insulation and associated method of production Jürgen Holz, Klaus Schrüfer 2009-05-05
7462901 Field effect transistor 2008-12-09
7405127 Method for producing a vertical field effect transistor 2008-07-29
7318993 Resistless lithography method for fabricating fine structures Rodger Fehlhaber 2008-01-15
7169677 Method for producing a spacer structure 2007-01-30
7157329 Trench capacitor with buried strap Jochen Beintner, Stephan Kudelka 2007-01-02
7157328 Selective etching to increase trench surface area Stephan Kudelka, Kenneth T. Settlemyer, Jr. 2007-01-02
7129152 Method for fabricating a short channel field-effect transistor Rodger Fehlhaber 2006-10-31
6967147 Nitrogen implantation using a shadow effect to control gate oxide thickness in DRAM semiconductor Jochen Beintner 2005-11-22
6960541 Process for fabrication of a semiconductor component having a tungsten oxide layer Dirk Drescher, Martin Schrems, Helmut Wurzer 2005-11-01
6905944 Sacrificial collar method for improved deep trench processing Michael P. Chudzik, Irene McStay, Porshia Wrschka 2005-06-14
6853025 Trench capacitor with buried strap Jochen Beintner, Stephan Kudelka 2005-02-08
6838334 Method of fabricating a buried collar Oleg Gluschenkov, Chung-Yung Sung 2005-01-04
6797636 Process of fabricating DRAM cells with collar isolation layers Rolf Weis 2004-09-28
6740555 Semiconductor structures and manufacturing methods Alexander Michaelis, Stephan Kudelka, Uwe Schroeder, Raj Jammy, Ulrike Gruening 2004-05-25
6740595 Etch process for recessing polysilicon in trench structures Stephan Kudelka, Alexander Michaelis, Uwe Schroeder, Martin Popp, Kristin Schupke +1 more 2004-05-25
6727142 Orientation independent oxidation of nitrided silicon Oleg Gluschenkov, Suryanarayan G. Hegde 2004-04-27
6723611 Vertical hard mask Hiroyuki Akatsu, Oleg Gluschenkov, Porshia S. Parkinson, Ravikumar Ramachandran, Kenneth T. Settlemyer, Jr. 2004-04-20
6677197 High aspect ratio PBL SiN barrier formation Stephan Kudelka 2004-01-13
6670235 Process flow for two-step collar in DRAM preparation Stephan Kudelka, Oliver Genz 2003-12-30
6656798 Gate processing method with reduced gate oxide corner and edge thinning Oleg Gluschenkov, Mary E. Weybright 2003-12-02
6620724 Low resistivity deep trench fill for DRAM and EDRAM applications Uwe Schroeder, Irene McStay, Manfred Hauf, Matthias Goldbach, Bernhard Sell +5 more 2003-09-16
6613642 Method for surface roughness enhancement in semiconductor capacitor manufacturing Stephen Rahn, Irene McStay, Uwe Schroeder, Stephan Kudelka, Rajarao Jammy 2003-09-02