Issued Patents All Time
Showing 26–50 of 150 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10566246 | Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices | Heng Wu, Kangguo Cheng, Junli Wang | 2020-02-18 |
| 10559491 | Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap | Kangguo Cheng, Sebastian Naczas, Heng Wu, Peng Xu | 2020-02-11 |
| 10546776 | Dual silicide liner flow for enabling low contact resistance | Praneet Adusumilli, Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2020-01-28 |
| 10510617 | CMOS VFET contacts with trench solid and liquid phase epitaxy | Oleg Gluschenkov, Shogo Mochizuki, Hiroaki Niimi, Tenko Yamashita | 2019-12-17 |
| 10490653 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Su Chen Fan, Heng Wu, Tenko Yamashita | 2019-11-26 |
| 10468412 | Formation of a semiconductor device with selective nitride grown on conductor | Ruqiang Bao, Dechao Guo | 2019-11-05 |
| 10431503 | Sacrificial cap for forming semiconductor contact | Praneet Adusumilli, Shogo Mochizuki, Jie Yang, Chun Wing Yeung | 2019-10-01 |
| 10381262 | Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap | Kangguo Cheng, Sebastian Naczas, Heng Wu, Peng Xu | 2019-08-13 |
| 10381442 | Low resistance source drain contact formation | Oleg Gluschenkov, Shogo Mochizuki, Hiroaki Niimi, Chun-Chen Yeh | 2019-08-13 |
| 10361210 | Low-drive current FinFET structure for improving circuit density of ratioed logic in SRAM devices | Veeraraghavan S. Basker, Dechao Guo, Tenko Yamashita, Chun-Chen Yeh | 2019-07-23 |
| 10354930 | S/D contact resistance measurement on FinFETs | Xin Miao, Chen Zhang | 2019-07-16 |
| 10347581 | Contact formation in semiconductor devices | Oleg Gluschenkov, Jiseok Kim, Shogo Mochizuki, Hiroaki Niimi | 2019-07-09 |
| 10347765 | Split fin field effect transistor enabling back bias on fin type field effect transistors | Veeraraghavan S. Basker, Xin Miao, Tenko Yamashita | 2019-07-09 |
| 10340292 | Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation | Kangguo Cheng, Juntao Li, Xin Miao | 2019-07-02 |
| 10319722 | Contact formation in semiconductor devices | Oleg Gluschenkov, Hiroaki Niimi, Joseph S. Washington, Tenko Yamashita | 2019-06-11 |
| 10319840 | Fin field effect transistor fabrication and devices having inverted T-shaped gate | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2019-06-11 |
| 10319835 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Su Chen Fan, Heng Wu, Tenko Yamashita | 2019-06-11 |
| 10312245 | Laser spike annealing for solid phase epitaxy and low contact resistance in an SRAM with a shared pFET and nFET trench | Gen Tsutsui, Heng Wu, Peng Xu | 2019-06-04 |
| 10256321 | Semiconductor device including enhanced low-k spacer | Kangguo Cheng, Chun Wing Yeung | 2019-04-09 |
| 10249542 | Self-aligned doping in source/drain regions for low contact resistance | Dechao Guo, Gen Tsutsui, Heng Wu | 2019-04-02 |
| 10249502 | Low resistance source drain contact formation with trench metastable alloys and laser annealing | Oleg Gluschenkov, Shogo Mochizuki, Hiroaki Niimi, Tenko Yamashita, Chun-Chen Yeh | 2019-04-02 |
| 10229987 | Epitaxial and silicide layer formation at top and bottom surfaces of semiconductor fins | Kangguo Cheng, Ruilong Xie, Tenko Yamashita | 2019-03-12 |
| 10229982 | Pure boron for silicide contact | Chia-Yu Chen, Sanjay C. Mehta, Tenko Yamashita | 2019-03-12 |
| 10224417 | Fin field effect transistor fabrication and devices having inverted T-shaped gate | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2019-03-05 |
| 10224420 | Punch through stopper in bulk finFET device | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2019-03-05 |