Issued Patents All Time
Showing 51–75 of 323 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11069775 | Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETS | Josephine B. Chang, Michael A. Guillorn, Isaac Lauer | 2021-07-20 |
| 11063134 | Vertical transistors with top spacers | Jingyun Zhang, Choonghyun Lee, Alexander Reznicek | 2021-07-13 |
| 11062965 | Flipped vertical field-effect-transistor | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2021-07-13 |
| 11062959 | Inner spacer and junction formation for integrating extended-gate and standard-gate nanosheet transistors | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2021-07-13 |
| 11056537 | Self-aligned gate contact integration with metal resistor | Richard A. Conti, Ruilong Xie, Kangguo Cheng | 2021-07-06 |
| 11049935 | Non-planar field effect transistor devices with low-resistance metallic gate structures | Kangguo Cheng, Chen Zhang, Wenyu Xu | 2021-06-29 |
| 11049979 | Long channel nanosheet FET having tri-layer spacers | Ruilong Xie, Jingyun Zhang, Choonghyun Lee | 2021-06-29 |
| 11038015 | Non-planar field effect transistor devices with low-resistance metallic gate structures | Kangguo Cheng, Chen Zhang, Wenyu Xu | 2021-06-15 |
| 11024738 | Measurement of top contact resistance in vertical field-effect transistor devices | Zuoguang Liu, Richard Southwick, Chun Wing Yeung | 2021-06-01 |
| 11017999 | Method and structure for forming bulk FinFET with uniform channel height | Kangguo Cheng, Juntao Li | 2021-05-25 |
| 11011411 | Semiconductor wafer having integrated circuits with bottom local interconnects | Chen Zhang, Wenyu Xu, Kangguo Cheng | 2021-05-18 |
| 11004933 | Field effect transistor structures | Josephine B. Chang, Bruce B. Doris, Michael A. Guillorn, Isaac Lauer | 2021-05-11 |
| 11004678 | Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacer | Bruce B. Doris, Michael A. Guillorn, Isaac Lauer | 2021-05-11 |
| 10998441 | Strained silicon complementary metal oxide semiconductor including a silicon containing tensile n-type fin field effect transistor and silicon containing compressive p-type fin field effect transistor formed using a dual relaxed substrate | Kangguo Cheng, Nicolas Loubet, Alexander Reznicek | 2021-05-04 |
| 10991798 | Replacement sacrificial nanosheets having improved etch selectivity | Wenyu Xu, Chen Zhang, Kangguo Cheng | 2021-04-27 |
| 10985161 | Single diffusion break isolation for gate-all-around field-effect transistor devices | Wenyu Xu, Chen Zhang, Kangguo Cheng | 2021-04-20 |
| 10978356 | Tri-layer STI liner for nanosheet leakage control | Choonghyun Lee, Alexander Reznicek, Jingyun Zhang | 2021-04-13 |
| 10971522 | High mobility complementary metal-oxide-semiconductor (CMOS) devices with fins on insulator | Chen Zhang, Kangguo Cheng, Wenyu Xu | 2021-04-06 |
| 10964602 | Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2021-03-30 |
| 10964601 | Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2021-03-30 |
| 10957798 | Nanosheet transistors with transverse strained channel regions | Kangguo Cheng, Wenyu Xu, Chen Zhang | 2021-03-23 |
| 10957783 | Fin cut etch process for vertical transistor devices | Wenyu Xu, Chen Zhang, Kangguo Cheng | 2021-03-23 |
| 10957693 | Vertical transistors with different gate lengths | Chen Zhang, Kangguo Cheng, Juntao Li | 2021-03-23 |
| 10957601 | Self-aligned fin recesses in nanosheet field effect transistors | Zhenxing Bi, Kangguo Cheng, Wenyu Xu | 2021-03-23 |
| 10944013 | Self-aligned source/drain contact for vertical field effect transistor | Wenyu Xu, Chen Zhang, Kangguo Cheng | 2021-03-09 |