Issued Patents All Time
Showing 51–75 of 605 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11818886 | Low program voltage flash memory cells with embedded heater in the control gate | Nanbo Gong, Bahman Hekmatshoartabari, Alexander Reznicek | 2023-11-14 |
| 11805713 | Drift mitigation for resistive memory devices | Guy M. Cohen, Nanbo Gong, Kevin W. Brew | 2023-10-31 |
| 11805714 | Phase change memory with conductive bridge filament | Nanbo Gong, Guy M. Cohen | 2023-10-31 |
| 11800698 | Semiconductor structure with embedded capacitor | Ruilong Xie, Alexander Reznicek, Bahman Hekmatshoartabari | 2023-10-24 |
| 11790243 | Ferroelectric field effect transistor for implementation of decision tree | Nanbo Gong, Guy M. Cohen | 2023-10-17 |
| 11784096 | Vertical transport field-effect transistors having germanium channel surfaces | Choonghyun Lee, Pouya Hashemi | 2023-10-10 |
| 11770986 | Etch-resistant doped scavenging carbide electrodes | John Rozen, Marinus Hopstaken, Yohei Ogawa, Masanobu Hatanaka, Kazuhiro Honda | 2023-09-26 |
| 11756996 | Formation of wrap-around-contact for gate-all-around nanosheet FET | Pouya Hashemi, Choonghyun Lee, Alexander Reznicek, Jingyun Zhang | 2023-09-12 |
| 11756960 | Multi-threshold voltage gate-all-around transistors | Jingyun Zhang, Choonghyun Lee | 2023-09-12 |
| 11748524 | Tamper resistant obfuscation circuit | Jean-Olivier Plouchart, Dirk Pfeiffer, Arvind Kumar, Peilin Song | 2023-09-05 |
| 11742425 | FinFET device with partial interface dipole formation for reduction of gate induced drain leakage | Alexander Reznicek, Pouya Hashemi, Ruilong Xie | 2023-08-29 |
| 11737289 | High density ReRAM integration with interconnect | Alexander Reznicek, Pouya Hashemi, Ruilong Xie | 2023-08-22 |
| 11735628 | Nanosheet metal-oxide semiconductor field effect transistor with asymmetric threshold voltage | Ruilong Xie, Alexander Reznicek, Jingyun Zhang | 2023-08-22 |
| 11730070 | Resistive random-access memory device with step height difference | Hiroyuki Miyazoe, Seyoung Kim, Asit Ray | 2023-08-15 |
| 11727977 | Non-volatile analog resistive memory cells implementing ferroelectric select transistors | Nanbo Gong | 2023-08-15 |
| 11707002 | CBRAM with controlled bridge location | Jianshi Tang, Reinaldo Vega, Praneet Adusumilli | 2023-07-18 |
| 11700778 | Method for controlling the forming voltage in resistive random access memory devices | Steven P. Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Paul C. Jamison +3 more | 2023-07-11 |
| 11688457 | Using ferroelectric field-effect transistors (FeFETs) as capacitive processing units for in-memory computing | Nanbo Gong, Guy M. Cohen, Yulong Li | 2023-06-27 |
| 11683941 | Resistive random access memory integrated with vertical transport field effect transistors | Alexander Reznicek, Karthik Balakrishnan, Bahman Hekmatshoartabari | 2023-06-20 |
| 11665983 | Phase change memory cell with ovonic threshold switch | Nanbo Gong, Robert L. Bruce, Alexander Reznicek, Bahman Hekmatshoartabari | 2023-05-30 |
| 11653578 | Phase-change material-based XOR logic gates | Nanbo Gong, Guy M. Cohen | 2023-05-16 |
| 11647684 | Nonvolatile tunable capacitive processing unit | Guy M. Cohen, Nanbo Gong, Yulong Li | 2023-05-09 |
| 11647680 | Oxide-based resistive memory having a plasma-exposed bottom electrode | Hiroyuki Miyazoe, Eduard A. Cartier, Babar A. Khan, Youngseok Kim, Dexin Kong +2 more | 2023-05-09 |
| 11647639 | Conductive bridging random access memory formed using selective barrier metal removal | Hiroyuki Miyazoe | 2023-05-09 |
| 11646362 | Vertical transport field-effect transistor structure having increased effective width and self-aligned anchor for source/drain region formation | Ruilong Xie, Alexander Reznicek, Pouya Hashemi | 2023-05-09 |