SB

Stephen W. Bedell

IBM: 333 patents #57 of 70,183Top 1%
Globalfoundries: 15 patents #235 of 4,424Top 6%
KT King Abdulaziz City For Science And Technology: 8 patents #16 of 573Top 3%
AG Azur Space Solar Power Gmbh: 1 patents #35 of 50Top 70%
ST S.O.I. Tec Silicon On Insulator Technologies: 1 patents #92 of 155Top 60%
SS Stmicroelectronics Sa: 1 patents #938 of 1,676Top 60%
📍 Wappingers Falls, NY: #2 of 884 inventorsTop 1%
🗺 New York: #45 of 115,490 inventorsTop 1%
Overall (All Time): #905 of 4,157,543Top 1%
347
Patents All Time

Issued Patents All Time

Showing 301–325 of 347 patents

Patent #TitleCo-InventorsDate
7880241 Low-temperature electrically activated gate electrode and method of fabricating same John C. Arnold, Keith E. Fogel, Devendra K. Sadana 2011-02-01
7833884 Strained semiconductor-on-insulator by Si:C combined with porous process Joel P. de Souza, Alexander Reznicek, Devendra K. Sadana 2010-11-16
7816664 Defect reduction by oxidation of silicon Huajie Chen, Anthony G. Domenicucci, Keith E. Fogel, Devendra K. Sadana 2010-10-19
7790495 Optoelectronic device with germanium photodetector Solomon Assefa, Yurii A. Vlasov, Fengnian Xia 2010-09-07
7785982 Structures containing electrodeposited germanium and methods for their fabrication Hariklia Deligianni, Qiang Huang, Lubomyr T. Romankiw, Devendra K. Sadana, Katherine L. Saenger 2010-08-31
7723791 Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels Huilong Zhu, Bruce B. Doris, Huajie Chen, Patricia M. Mooney 2010-05-25
7705345 High performance strained silicon FinFETs device and method for forming same Kevin K. Chan, Dureseti Chidambarrao, Silke H. Christianson, Jack O. Chu, Anthony G. Domenicucci +4 more 2010-04-27
7682917 Disposable metallic or semiconductor gate spacer Michael P. Chudzik, William K. Henson, Naim Moumen, Vijay Narayanan, Devendra K. Sadana +2 more 2010-03-23
7679141 High-quality SGOI by annealing near the alloy melting point Huajie Chen, Anthony G. Domenicucci, Keith E. Fogel, Richard J. Murphy, Devendra K. Sadana 2010-03-16
7592671 Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer Thomas N. Adam, Joel P. de Souza, Keith E. Fogel, Alexander Reznicek, Devendra K. Sadana +1 more 2009-09-22
7550370 Method of forming thin SGOI wafers with high relaxation and low stacking fault defect density Huajie Chen, Devendra K. Sadana, Dan M. Mocuta 2009-06-23
7511317 Porous silicon for isolation region formation and related structure Thomas N. Adam, Joel P. de Souza, Kathryn T. Schonenberg, Thomas A. Wallner 2009-03-31
7507988 Semiconductor heterostructure including a substantially relaxed, low defect density SiGe layer Huajie Chen, Anthony G. Domenicucci, Keith E. Fogel, Devendra K. Sadana 2009-03-24
7501318 Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal Keith E. Fogel, Devendra K. Sadana, Ghavam G. Shahidi 2009-03-10
7494852 Method for creating a Ge-rich semiconductor material for high-performance CMOS circuits Bruce B. Doris, Devendra K. Sadana 2009-02-24
7485539 Strained semiconductor-on-insulator (sSOI) by a simox method Thomas N. Adam, Joel P. de Souza, Keith E. Fogel, Alexander Reznicek, Devendra K. Sadana +1 more 2009-02-03
7473587 High-quality SGOI by oxidation near the alloy melting temperature Anthony G. Domenicucci, Keith E. Fogel, Devendra K. Sadana 2009-01-06
7442993 Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer Anthony G. Domenicucci, Keith E. Fogel, Effendi Leobandung, Devendra K. Sadana 2008-10-28
7423303 Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels Huilong Zhu, Bruce B. Doris, Huajie Chen, Patricia M. Mooney 2008-09-09
7358166 Relaxed, low-defect SGOI for strained Si CMOS applications Paul D. Agnello, Robert H. Dennard, Anthony G. Domenicucci, Keith E. Fogel, Devendra K. Sadana 2008-04-15
7348253 High-quality SGOI by annealing near the alloy melting point Huajie Chen, Anthony G. Domenicucci, Keith E. Fogel, Richard J. Murphy, Devendra K. Sadana 2008-03-25
7342293 Bipolar junction transistors (BJTS) with second shallow trench isolation (STI) regions, and methods for forming same Thomas A. Wallner, Thomas N. Adam, Joel P. de Souza 2008-03-11
7304328 Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion Keith E. Fogel, Devendra K. Sadana 2007-12-04
7271043 Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels Huilong Zhu, Bruce B. Doris, Huajie Chen, Patricia M. Mooney 2007-09-18
7247546 Method of forming strained silicon materials with improved thermal conductivity Huajie Chen, Keith E. Fogel, Ryan Mitchell, Devendra K. Sadana 2007-07-24