RX

Ruilong Xie

IBM: 731 patents #10 of 70,183Top 1%
Globalfoundries: 577 patents #1 of 4,424Top 1%
SS Stmicroelectronics Sa: 62 patents #8 of 1,676Top 1%
GU Globalfoundries U.S.: 29 patents #17 of 665Top 3%
GP Globalfoundries Singapore Pte.: 5 patents #141 of 828Top 20%
IN Intermolecular: 1 patents #186 of 248Top 75%
📍 Niskayuna, NY: #1 of 949 inventorsTop 1%
🗺 New York: #3 of 115,490 inventorsTop 1%
Overall (All Time): #53 of 4,157,543Top 1%
1139
Patents All Time

Issued Patents All Time

Showing 976–1,000 of 1,139 patents

Patent #TitleCo-InventorsDate
9536836 MIS (Metal-Insulator-Semiconductor) contact structures for semiconductor devices Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz 2017-01-03
9536877 Methods of forming different spacer structures on integrated circuit products having differing gate pitch dimensions and the resulting products Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz 2017-01-03
9530775 Methods of forming different FinFET devices having different fin heights and an integrated circuit product containing such devices Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz 2016-12-27
9520392 Semiconductor device including finFET and fin varactor Kangguo Cheng, Junli Wang, Tenko Yamashita 2016-12-13
9515163 Methods of forming FinFET semiconductor devices with self-aligned contact elements using a replacement gate process and the resulting devices Shom Ponoth, Balasubramanian Pranatharthiharan 2016-12-06
9515180 Vertical slit transistor with optimized AC performance Qing Liu, Xiuyu Cai, Chun-Chen Yeh 2016-12-06
9508604 Methods of forming punch through stop regions on FinFET devices on CMOS-based IC products using doped spacers Min Gyu Sung, Chanro Park, Hoon Kim 2016-11-29
9502518 Multi-channel gate-all-around FET Qing Liu, Chun-Chen Yeh, Xiuyu Cai 2016-11-22
9502308 Methods for forming transistor devices with different source/drain contact liners and the resulting devices Chanro Park, Hoon Kim, Min Gyu Sung 2016-11-22
9502286 Methods of forming self-aligned contact structures on semiconductor devices and the resulting devices Chanro Park, Min Gyu Sung, Hoon Kim, Andre P. Labonte 2016-11-22
9502302 Process for integrated circuit fabrication including a uniform depth tungsten recess technique Qing Liu, Chun-Chen Yeh 2016-11-22
9496354 Semiconductor devices with dummy gate structures partially on isolation regions Xiuyu Cai, Ajey Poovannummoottil Jacob, Andreas Knorr, Christopher M. Prindle 2016-11-15
9496185 Dual channel finFET with relaxed pFET region Xiuyu Cai, Qing Liu, Chun-Chen Yeh 2016-11-15
9484306 MOSFET with asymmetric self-aligned contact Kangguo Cheng, Xin Miao, Tenko Yamashita 2016-11-01
9478661 Semiconductor device structures with self-aligned fin structure(s) and fabrication methods thereof Chanro Park, Hoon Kim, Min Gyu Sung 2016-10-25
9478634 Methods of forming replacement gate structures on finFET devices and the resulting devices Xiuyu Cai 2016-10-25
9478538 Methods for forming transistor devices with different threshold voltages and the resulting devices Hoon Kim, Min Gyu Sung, Chanro Park 2016-10-25
9478662 Gate and source/drain contact structures for a semiconductor device Andre P. Labonte 2016-10-25
9472670 Field effect transistor device spacers Rama Kambhampati, Junli Wang, Tenko Yamashita 2016-10-18
9472446 Methods of forming a FinFET semiconductor device with a unique gate configuration, and the resulting FinFET device Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz 2016-10-18
9466491 Methods of forming a semiconductor device with a spacer etch block cap and the resulting device Daniel T. Pham, Hyun-Jin Cho 2016-10-11
9466722 Large area contacts for small transistors Qing Liu, Xiuyu Cai, Chun-Chen Yeh 2016-10-11
9466676 Method for forming a semiconductor device having a metal gate recess Vimal Kamineni 2016-10-11
9466570 MOSFET with asymmetric self-aligned contact Kangguo Cheng, Xin Miao, Tenko Yamashita 2016-10-11
9461171 Methods of increasing silicide to epi contact areas and the resulting devices Hoon Kim, Naim Moumen, Chanro Park, William J. Taylor, Jr. 2016-10-04