Issued Patents All Time
Showing 426–450 of 581 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9634142 | Method for improving boron diffusion in a germanium-rich fin through germanium concentration reduction in fin S/D regions by thermal mixing | Dominic J. Schepis, Alexander Reznicek, Kangguo Cheng | 2017-04-25 |
| 9633943 | Method and structure for forming on-chip anti-fuse with reduced breakdown voltage | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-04-25 |
| 9633912 | Complementary heterogeneous MOSFET using global SiGe substrate and hard-mask memorized germanium dilution for nFET | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-04-25 |
| 9633908 | Method for forming a semiconductor structure containing high mobility semiconductor channel materials | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-04-25 |
| 9627536 | Field effect transistors with strained channel features | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-04-18 |
| 9627491 | Aspect ratio trapping and lattice engineering for III/V semiconductors | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-04-18 |
| 9627381 | Confined N-well for SiGe strain relaxed buffer structures | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-04-18 |
| 9627270 | Dual work function integration for stacked FinFET | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-04-18 |
| 9627267 | Integrated circuit having strained fins on bulk substrate and method to fabricate same | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-04-18 |
| 9614040 | Strained silicon germanium fin with block source/drain epitaxy and improved overlay capacitance | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-04-04 |
| 9614037 | Nano-ribbon channel transistor with back-bias control | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-04-04 |
| 9613873 | Nanowire semiconductor device | Karthik Balakrishnan, Sanghoon Lee | 2017-04-04 |
| 9608066 | High-K spacer for extension-free CMOS devices with high mobility channel materials | Takashi Ando, Vijay Narayanan, Yanning Sun | 2017-03-28 |
| 9608068 | Substrate with strained and relaxed silicon regions | Kangguo Cheng, Bruce B. Doris, Hong He, Alexander Reznicek | 2017-03-28 |
| 9608063 | Nanowire transistor structures with merged source/drain regions using auxiliary pillars | Ali Khakifirooz, Alexander Reznicek | 2017-03-28 |
| 9607990 | Method to form strained nFET and strained pFET nanowires on a same substrate | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-03-28 |
| 9595595 | Method of forming field effect transistors (FETs) with abrupt junctions and integrated circuit chips with the FETs | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-03-14 |
| 9595525 | Semiconductor device including nanowire transistors with hybrid channels | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-03-14 |
| 9589827 | Shallow trench isolation regions made from crystalline oxides | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek, Charan V. Surisetty | 2017-03-07 |
| 9583599 | Forming a fin using double trench epitaxy | Veeraraghavan S. Basker, Shogo Mochizuki, Alexander Reznicek | 2017-02-28 |
| 9583572 | FinFET devices having silicon germanium channel fin structures with uniform thickness | Veeraraghavan S. Basker, Keith E. Fogel, Alexander Reznicek | 2017-02-28 |
| 9583507 | Adjacent strained <100> NFET fins and <110> PFET fins | Kangguo Cheng, Bruce B. Doris, Alexander Reznicek | 2017-02-28 |
| 9576858 | Dual work function integration for stacked FinFET | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-02-21 |
| 9570300 | Strain relaxed buffer layers with virtually defect free regions | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-02-14 |
| 9570356 | Multiple gate length vertical field-effect-transistors | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-02-14 |