Issued Patents All Time
Showing 376–400 of 581 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9761726 | Vertical field effect transistor with undercut buried insulating layer to improve contact resistance | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-09-12 |
| 9761667 | Semiconductor structure with a silicon germanium alloy fin and silicon germanium alloy pad structure | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-09-12 |
| 9761661 | Stacked strained and strain-relaxed hexagonal nanowires | Takashi Ando, John A. Ott, Alexander Reznicek | 2017-09-12 |
| 9761608 | Lateral bipolar junction transistor with multiple base lengths | Karthik Balakrishnan, Tak H. Ning, Alexander Reznicek | 2017-09-12 |
| 9761587 | Tall strained high percentage silicon germanium fins for CMOS | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-09-12 |
| 9761499 | Semiconductor device structure with 110-PFET and 111-NFET current flow direction | Ali Khakifirooz, Shogo Mochizuki, Alexander Reznicek | 2017-09-12 |
| 9755078 | Structure and method for multi-threshold voltage adjusted silicon germanium alloy devices with same silicon germanium content | Pranita Kerber, Christine Qiqing Ouyang, Alexander Reznicek | 2017-09-05 |
| 9754933 | Large area diode co-integrated with vertical field-effect-transistors | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-09-05 |
| 9754875 | Designable channel FinFET fuse | Keith E. Fogel, Shogo Mochizuki, Alexander Reznicek | 2017-09-05 |
| 9748365 | SiGe and Si FinFET structures and methods for making the same | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2017-08-29 |
| 9748098 | Controlled confined lateral III-V epitaxy | Karthik Balakrishnan, Lukas Czornomaz, Alexander Reznicek | 2017-08-29 |
| 9748385 | Method for forming vertical Schottky contact FET | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-08-29 |
| 9735258 | Nanowire semiconductor device | Karthik Balakrishnan, Sanghoon Lee | 2017-08-15 |
| 9735272 | Method to controllably etch silicon recess for ultra shallow junctions | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2017-08-15 |
| 9735175 | Integrated circuit with heterogeneous CMOS integration of strained silicon germanium and group III-V semiconductor materials and method to fabricate same | Cheng-Wei Cheng, Effendi Leobandung, Alexander Reznicek | 2017-08-15 |
| 9735176 | Stacked nanowires with multi-threshold voltage solution for PFETS | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-08-15 |
| 9735160 | Method of co-integration of strained silicon and strained germanium in semiconductor devices including fin structures | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-08-15 |
| 9728542 | High density programmable e-fuse co-integrated with vertical FETs | Karthik Balakrishnan, Michael A. Guillorn, Alexander Reznicek | 2017-08-08 |
| 9726634 | Superhydrophobic electrode and biosensing device using the same | Ali Afzali-Ardakani, Karthik Balakrishnan, Stephen W. Bedell, Bahman Hekmatshoartabari, Alexander Reznicek | 2017-08-08 |
| 9722052 | Fin cut without residual fin defects | Kangguo Cheng, Alexander Reznicek, Dominic J. Schepis | 2017-08-01 |
| 9722048 | Vertical transistors with reduced bottom electrode series resistance | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-08-01 |
| 9721970 | Gate all-around FinFET device and a method of manufacturing same | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-08-01 |
| 9721851 | Silicon-germanium fin formation | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-08-01 |
| 9716173 | Compressive strain semiconductor substrates | Karthik Balakrishnan, Nicolas Loubet, Alexander Reznicek | 2017-07-25 |
| 9716155 | Vertical field-effect-transistors having multiple threshold voltages | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2017-07-25 |